There is one LCDIF embedded in i.MX93 SoC to connect with
MIPI DSI controller through LCDIF cross line pattern(controlled
by mediamix blk-ctrl) or connect with LVDS display bridge(LDB)
directly or connect with a parallel display through parallel
display format(also controlled by mediamix blk-ctrl). i.MX93
LCDIF IP is essentially the same to i.MX8MP LCDIF IP. Add device
tree binding for i.MX93 LCDIF.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
Reviewed-by: Marek Vasut <marex@xxxxxxx>
Signed-off-by: Liu Ying <victor.liu@xxxxxxx>
---
v2->v3:
* No change.
v1->v2:
* Add Krzysztof's A-b and Marek's R-b tags on patch 1/6.
Documentation/devicetree/bindings/display/fsl,lcdif.yaml | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/fsl,lcdif.yaml b/Documentation/devicetree/bindings/display/fsl,lcdif.yaml
index 75b4efd70ba8..fc11ab5fc465 100644
--- a/Documentation/devicetree/bindings/display/fsl,lcdif.yaml
+++ b/Documentation/devicetree/bindings/display/fsl,lcdif.yaml
@@ -21,6 +21,7 @@ properties:
- fsl,imx28-lcdif
- fsl,imx6sx-lcdif
- fsl,imx8mp-lcdif
+ - fsl,imx93-lcdif
- items:
- enum:
- fsl,imx6sl-lcdif
@@ -88,7 +89,9 @@ allOf:
properties:
compatible:
contains:
- const: fsl,imx8mp-lcdif
+ enum:
+ - fsl,imx8mp-lcdif
+ - fsl,imx93-lcdif
then:
properties:
clocks:
@@ -107,6 +110,7 @@ allOf:
enum:
- fsl,imx6sx-lcdif
- fsl,imx8mp-lcdif
+ - fsl,imx93-lcdif
then:
properties:
clocks:
@@ -123,6 +127,7 @@ allOf:
- fsl,imx8mm-lcdif
- fsl,imx8mn-lcdif
- fsl,imx8mp-lcdif
+ - fsl,imx93-lcdif
then:
required:
- power-domains
--
2.37.1
