Re: [PATCH v12 00/18] drm: Add Samsung MIPI DSIM bridge

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



Hi Jagan and others

I'm trying to test this series on our imx8mp-based boards, which has the
mipi-dsi connected to a ti,sn65dsi86 bridge (in turn connected to a
full-size DP-connector). But I don't know how to add the proper nodes to
imx8mp.dtsi. My current, obviously incomplete, attempt is

	mipi_dsi: dsi@32e60000 {
		compatible = "fsl,imx8mp-mipi-dsim";
		reg = <0x32e60000 0x400>;
		clocks = <&clk IMX8MP_CLK_MEDIA_APB_ROOT>,
			 <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
		clock-names = "bus_clk", "sclk_mipi";

		/* assigned-clocks = <&clk IMX8MM_CLK_DSI_CORE>, */
		/* 		  <&clk IMX8MM_VIDEO_PLL1_OUT>, */
		/* 		  <&clk IMX8MM_CLK_DSI_PHY_REF>; */
		/* assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_266M>, */
		/* 			 <&clk IMX8MM_VIDEO_PLL1_BYPASS>, */
		/* 			 <&clk IMX8MM_VIDEO_PLL1_OUT>; */
		/* assigned-clock-rates = <266000000>, <594000000>, <27000000>; */

		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
		power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_DSI_1>;
		samsung,burst-clock-frequency = <891000000>;
		samsung,esc-clock-frequency = <54000000>;
		samsung,pll-clock-frequency = <27000000>;
		status = "disabled";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				#address-cells = <1>;
				#size-cells = <0>;

				dsi_in_lcdif: endpoint@0 {
					reg = <0>;
					remote-endpoint = <&lcdif_out_dsi>;
				};
			};

			port@1 {
				reg = <1>;
			};
		};
	};

	lcdif1: display-controller@32e80000 {
		compatible = "fsl,imx8mp-lcdif";
		reg = <0x32e80000 0x238>;
		interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&clk IMX8MP_CLK_MEDIA_DISP1_PIX_ROOT>,
			 <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>,
			 <&clk IMX8MP_CLK_MEDIA_APB_ROOT>;
		clock-names = "pix", "axi", "disp_axi";
		assigned-clocks = <&clk IMX8MP_CLK_MEDIA_DISP1_PIX>,
				  <&clk IMX8MP_VIDEO_PLL1>;
		assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>,
					 <&clk IMX8MP_VIDEO_PLL1_REF_SEL>;
		assigned-clock-rates = <0>, <1039500000>;
		power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_LCDIF_1>;
		status = "disabled";

		port {
			lcdif_out_dsi: endpoint {
				remote-endpoint = <&dsi_in_lcdif>;
			};
		};
	};

The lcdif1 node is based on
https://lore.kernel.org/linux-arm-kernel/20221208090842.2869374-1-alexander.stein@xxxxxxxxxxxxxxx/
, which is now in next-20230127 as commit 94e6197dadc9. I know that one
works because one of our boards has an lvds display, but I don't know if
I've done the appropriate changes when copying the lcdif2 node to
lcdif1. And I'm even more at a loss when trying to fill out the mipi_dsi
node; I've tried doing some surgery of the one in imx8mm.dtsi with the
one from the NXP 5.15.32 kernel, but it's obviously not finished, and
I'm out of ideas.

Thanks,
Rasmus



[Index of Archives]     [Linux DRI Users]     [Linux Intel Graphics]     [Linux USB Devel]     [Video for Linux]     [Linux Audio Users]     [Yosemite News]     [Linux Kernel]     [Linux SCSI]     [XFree86]     [Linux USB Devel]     [Video for Linux]     [Linux Audio Users]     [Linux Kernel]     [Linux SCSI]     [XFree86]
  Powered by Linux