Add support for matching QFPROM fuse values to get the correct speed bin on A650 (SM8250) GPUs. Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx> --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index 2c1630f0c04c..f139ec57c32d 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -1887,6 +1887,20 @@ static u32 a640_get_speed_bin(u32 fuse) return UINT_MAX; } +static u32 a650_get_speed_bin(u32 fuse) +{ + if (fuse == 0) + return 0; + else if (fuse == 1) + return 1; + else if (fuse == 2) + return 2; + else if (fuse == 3) + return 3; + + return UINT_MAX; +} + static u32 adreno_7c3_get_speed_bin(u32 fuse) { if (fuse == 0) @@ -1915,6 +1929,9 @@ static u32 fuse_to_supp_hw(struct device *dev, struct adreno_rev rev, u32 fuse) if (adreno_cmp_rev(ADRENO_REV(6, 4, 0, ANY_ID), rev)) val = a640_get_speed_bin(fuse); + if (adreno_cmp_rev(ADRENO_REV(6, 5, 0, ANY_ID), rev)) + val = a650_get_speed_bin(fuse); + if (val == UINT_MAX) { DRM_DEV_ERROR(dev, "missing support for speed-bin: %u. Some OPPs may not be supported by hardware\n", -- 2.39.0