On 12/9/22 16:23, Jagan Teki wrote:
HSA/HBP/HFP/HSE mode bits in Processor Reference Manuals specify a naming conversion as 'disable mode bit' due to its bit definition, 0 = Enable and 1 = Disable. For HSE bit, the i.MX 8M Mini/Nano/Plus Applications Processor Reference Manual named this bit as 'HseDisableMode' but the bit definition is quite opposite like 0 = Disables transfer 1 = Enables transfer which clearly states that HSE is not a disable bit. HSE is named as per the manual even though it is not a disable bit however the driver logic for handling HSE is based on the MIPI_DSI_MODE_VIDEO_HSE flag itself. Cc: Nicolas Boichat <drinkcat@xxxxxxxxxxxx> Signed-off-by: Jagan Teki <jagan@xxxxxxxxxxxxxxxxxxxx>
Reviewed-by: Marek Vasut <marex@xxxxxxx>
