+ dri-devel On Thu, Dec 8, 2022 at 2:25 PM Sung Joon Kim <Sungjoon.Kim@xxxxxxx> wrote: > > The missing DPCD defintions from DP2.0 spec is as follows: > > DOWNSPREAD_CTRL (107h): > ADAPTIVE_SYNC_SDP_EN (bit 6) > For sink devices that support Adaptive-Sync operation > and Panel Replay > > DPRX_FEATURE_ENUMERATION_LIST_CONT_1 (2214h): > ADAPTIVE_SYNC_SDP_SUPPORTED (bit 0) > Bit to check sink device has Adaptive-Sync capability > AS_SDP_FIRST_HALF_LINE_OR_3840_PIXEL_CYCLE_WINDOW_NOT_SUPPORTED (bit 1) > A sink device that clears this bit will generate VSync pulse > leading edge of the HDMI output on the line count at which > Adaptive-Sync SDP is received as long as source device transmits > Adaptive-Sync SDP either in first line or first 3840 pixel cycles > of the line whichever occurs first. > VSC_EXT_SDP_FRAMEWORK_VERSION_1_SUPPORTED (bit 4) > Bit to check sink device has SDP framework version 1 capability > --- > include/drm/display/drm_dp.h | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h > index 4d0abe4c7ea9..4f33b6aeb91e 100644 > --- a/include/drm/display/drm_dp.h > +++ b/include/drm/display/drm_dp.h > @@ -603,6 +603,7 @@ > > #define DP_DOWNSPREAD_CTRL 0x107 > # define DP_SPREAD_AMP_0_5 (1 << 4) > +# define DP_ADAPTIVE_SYNC_SDP_EN (1 << 6) > # define DP_MSA_TIMING_PAR_IGNORE_EN (1 << 7) /* eDP */ > > #define DP_MAIN_LINK_CHANNEL_CODING_SET 0x108 > @@ -1105,6 +1106,11 @@ > # define DP_VSC_EXT_CEA_SDP_SUPPORTED (1 << 6) /* DP 1.4 */ > # define DP_VSC_EXT_CEA_SDP_CHAINING_SUPPORTED (1 << 7) /* DP 1.4 */ > > +#define DP_DPRX_FEATURE_ENUMERATION_LIST_CONT_1 0x2214 /* 2.0 E11 */ > +# define DP_ADAPTIVE_SYNC_SDP_SUPPORTED (1 << 0) > +# define DP_AS_SDP_FIRST_HALF_LINE_OR_3840_PIXEL_CYCLE_WINDOW_NOT_SUPPORTED (1 << 1) > +# define DP_VSC_EXT_SDP_FRAMEWORK_VERSION_1_SUPPORTED (1 << 4) > + > #define DP_128B132B_SUPPORTED_LINK_RATES 0x2215 /* 2.0 */ > # define DP_UHBR10 (1 << 0) > # define DP_UHBR20 (1 << 1) > -- > 2.20.1 >
