From: Tomasz Jankowski <tomasz1.jankowski@xxxxxxxxx> Get the hardware information from register MMIO_IBUFFS Signed-off-by: Tomasz Jankowski <tomasz1.jankowski@xxxxxxxxx> Tested-by: Mikolaj Grzybowski <mikolajx.grzybowski@xxxxxxxxx> Co-developed-by: Jianxun Zhang <jianxun.zhang@xxxxxxxxxxxxxxx> Signed-off-by: Jianxun Zhang <jianxun.zhang@xxxxxxxxxxxxxxx> Co-developed-by: Maciej Kwapulinski <maciej.kwapulinski@xxxxxxxxxxxxxxx> Signed-off-by: Maciej Kwapulinski <maciej.kwapulinski@xxxxxxxxxxxxxxx> --- drivers/gpu/drm/gna/gna_device.c | 4 ++++ drivers/gpu/drm/gna/gna_device.h | 9 +++++++++ drivers/gpu/drm/gna/gna_hw.h | 7 +++++++ 3 files changed, 20 insertions(+) diff --git a/drivers/gpu/drm/gna/gna_device.c b/drivers/gpu/drm/gna/gna_device.c index b8620b7da205..1f357221a603 100644 --- a/drivers/gpu/drm/gna/gna_device.c +++ b/drivers/gpu/drm/gna/gna_device.c @@ -42,6 +42,7 @@ int gna_probe(struct device *parent, struct gna_dev_info *dev_info, void __iomem { struct gna_device *gna_priv; struct drm_device *drm_dev; + u32 bld_reg; int err; gna_priv = devm_drm_dev_alloc(parent, &gna_drm_driver, struct gna_device, drm); @@ -59,6 +60,9 @@ int gna_probe(struct device *parent, struct gna_dev_info *dev_info, void __iomem return err; } + bld_reg = gna_reg_read(gna_priv, GNA_MMIO_IBUFFS); + gna_priv->hw_info.in_buf_s = bld_reg & GENMASK(7, 0); + dev_set_drvdata(parent, drm_dev); err = gna_drm_dev_init(drm_dev); diff --git a/drivers/gpu/drm/gna/gna_device.h b/drivers/gpu/drm/gna/gna_device.h index d269f7da5c5e..e42f167b62a0 100644 --- a/drivers/gpu/drm/gna/gna_device.h +++ b/drivers/gpu/drm/gna/gna_device.h @@ -6,6 +6,9 @@ #include <drm/drm_device.h> +#include <linux/io.h> +#include <linux/types.h> + #include "gna_hw.h" #define DRIVER_NAME "gna" @@ -24,7 +27,13 @@ struct gna_device { /* device related resources */ void __iomem *iobase; struct gna_dev_info info; + struct gna_hw_info hw_info; }; int gna_probe(struct device *parent, struct gna_dev_info *dev_info, void __iomem *iobase); +static inline u32 gna_reg_read(struct gna_device *gna_priv, u32 reg) +{ + return readl(gna_priv->iobase + reg); +} + #endif /* __GNA_DEVICE_H__ */ diff --git a/drivers/gpu/drm/gna/gna_hw.h b/drivers/gpu/drm/gna/gna_hw.h index 3ca801096fd1..e858b76606fc 100644 --- a/drivers/gpu/drm/gna/gna_hw.h +++ b/drivers/gpu/drm/gna/gna_hw.h @@ -6,6 +6,13 @@ #include <linux/mm_types.h> +/* GNA MMIO registers */ +#define GNA_MMIO_IBUFFS 0xB4 + +struct gna_hw_info { + u8 in_buf_s; +}; + struct gna_dev_info { u32 hwid; u32 num_pagetables; -- 2.25.1 --------------------------------------------------------------------- Intel Technology Poland sp. z o.o. ul. Slowackiego 173 | 80-298 Gdansk | Sad Rejonowy Gdansk Polnoc | VII Wydzial Gospodarczy Krajowego Rejestru Sadowego - KRS 101882 | NIP 957-07-52-316 | Kapital zakladowy 200.000 PLN. Spolka oswiadcza, ze posiada status duzego przedsiebiorcy w rozumieniu ustawy z dnia 8 marca 2013 r. o przeciwdzialaniu nadmiernym opoznieniom w transakcjach handlowych. Ta wiadomosc wraz z zalacznikami jest przeznaczona dla okreslonego adresata i moze zawierac informacje poufne. W razie przypadkowego otrzymania tej wiadomosci, prosimy o powiadomienie nadawcy oraz trwale jej usuniecie; jakiekolwiek przegladanie lub rozpowszechnianie jest zabronione. This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). If you are not the intended recipient, please contact the sender and delete all copies; any review or distribution by others is strictly prohibited.