On Thu, 1 Sept 2022 at 15:20, Teresa Remmet <t.remmet@xxxxxxxxx> wrote: > > Soft reset during tc_bridge_enable() is triggered by setting all available > reset control bits in the SYSRST register. > But as noted in the data sheet resetting the i2c-slave controller should > be only done over DSI and is only useful for chip debugging. > So do not set RSTI2CS (bit0). > > Signed-off-by: Teresa Remmet <t.remmet@xxxxxxxxx> > --- > drivers/gpu/drm/bridge/tc358775.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc358775.c > index f1c6e62b0e1d..a5f5eae1e80f 100644 > --- a/drivers/gpu/drm/bridge/tc358775.c > +++ b/drivers/gpu/drm/bridge/tc358775.c > @@ -408,7 +408,7 @@ static void tc_bridge_enable(struct drm_bridge *bridge) > (val >> 8) & 0xFF, val & 0xFF); > > d2l_write(tc->i2c, SYSRST, SYS_RST_REG | SYS_RST_DSIRX | SYS_RST_BM | > - SYS_RST_LCD | SYS_RST_I2CM | SYS_RST_I2CS); > + SYS_RST_LCD | SYS_RST_I2CM); > usleep_range(30000, 40000); > > d2l_write(tc->i2c, PPI_TX_RX_TA, TTA_GET | TTA_SURE); > -- > 2.25.1 > Reviewed-by: Robert Foss <robert.foss@xxxxxxxxxx> Waiting a few days before applying this patch.
