On Tue, Aug 30, 2022 at 1:12 AM Adam Ford <aford173@xxxxxxxxx> wrote: > > On Mon, Aug 29, 2022 at 1:41 PM Jagan Teki <jagan@xxxxxxxxxxxxxxxxxxxx> wrote: > > > > The i.MX 8M Mini Applications Processor Reference Manual, Rev. 3, 11/2020 > > with 13.7.10.1 Master PLL PMS Value setting Register mentioned PMS_P offset > > range from BIT[18-13] and the upstream driver is using the same offset. > > > > However, offset 13 is not working on i.MX8M Mini platforms but downstream > > NXP driver is using 14 [1] and it is working with i.MX8M Mini SoC. > > From the line you highlighted in the link, the downstream NXP ones > shows 13 if I'm reading it correctly. > > #define PLLCTRL_SET_P(x) REG_PUT(x, 18, 13) PMS_P value set in sec_mipi_dsim_check_pll_out using PLLCTRL_SET_P() with offset 13 and then an additional offset of one bit added in sec_mipi_dsim_config_pll via PLLCTRL_SET_PMS(). Please check this for additional information https://github.com/fschrempf/linux/commit/bbb3549a99e162ef6ad4c83d5fd4d39a6daa6d56 I'll update the additional information in commit messages in v5. Thanks, Jagan.
