Hi CK,
Thanks for the reviews.
On Mon, 2022-09-12 at 18:00 +0800, CK Hu wrote:
> Hi, Jason:
>
> On Mon, 2022-09-12 at 09:30 +0800, Jason-JH.Lin wrote:
> > From: "zheng-yan.chen" <zheng-yan.chen@xxxxxxxxxxxx>
> >
> > Since the previous gamma_set_common() function is designed for
> > 9bit-to-10bit conversion, which is not feasible for the
> > 10bit-to-12bit conversion in mt8195.
> >
> > 1. Update the function to fit the need of mt8195.
> > 2. Add gamma driver data for mt8195.
> >
> > Signed-off-by: zheng-yan.chen <zheng-yan.chen@xxxxxxxxxxxx>
> > Signed-off-by: Jason-JH.Lin <jason-jh.lin@xxxxxxxxxxxx>
> > ---
> > drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 57 ++++++++++++++++---
> > --
> > --
> > 1 file changed, 40 insertions(+), 17 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> > b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> > index 45da2b6206c8..d706f76fd30e 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> > @@ -23,6 +23,7 @@
> > #define DISP_GAMMA_SIZE 0x0030
> > #define DISP_GAMMA_BANK 0x0100
> > #define DISP_GAMMA_LUT 0x0700
> > +#define DISP_GAMMA_LUT1 0x0b00
> >
> > #define LUT_10BIT_MASK 0x03ff
> > #define LUT_SIZE_DEFAULT 512 /* for setting
> > gamma lut from AAL */
> > @@ -82,9 +83,8 @@ void mtk_gamma_set_common(struct device *dev,
> > void
> > __iomem *regs, struct drm_crt
> > u8 shift_bits;
> > unsigned int i, j, reg, bank_num;
> > struct drm_color_lut *lut;
> > - void __iomem *lut_base;
> > - u32 word, mask;
> > - u32 diff[3] = {0};
> > + void __iomem *lut_base, *lut1_base;
> > + u32 word, word1, mask;
> >
> > if (gamma && gamma->data) {
> > lut_diff = gamma->data->lut_diff;
> > @@ -102,27 +102,41 @@ void mtk_gamma_set_common(struct device *dev,
> > void __iomem *regs, struct drm_crt
> > reg = reg | GAMMA_LUT_EN;
> > writel(reg, regs + DISP_GAMMA_CFG);
> > lut_base = regs + DISP_GAMMA_LUT;
> > + lut1_base = regs + DISP_GAMMA_LUT1;
> > lut = (struct drm_color_lut *)state->gamma_lut->data;
> > for (j = 0; j < bank_num; j++) {
> > writel(j, regs + DISP_GAMMA_BANK);
> > for (i = 0; i < bank_size; i++) {
> > - if (!lut_diff || (i % 2 == 0)) {
> > - word = (((lut[i].red >>
> > shift_bits) & mask) << 20) +
> > - (((lut[i].green >>
> > shift_bits) & mask) << 10) +
> > - ((lut[i].blue >>
> > shift_bits) & mask);
> > + struct drm_color_lut input;
> > +
> > + input.red = (lut[i].red >> shift_bits)
> > & mask;
> > + input.green = (lut[i].green >>
> > shift_bits) & mask;
> > + input.blue = (lut[i].blue >>
> > shift_bits) & mask;
> > + if (!lut_diff || i % 2 == 0) {
> > + word = (lut_bits == 12) ?
>
> Move lut_bits modification to the patch "drm/mediatek: Add gamma
> support different lut_bits for other SoC".
OK, I'll move this.
>
> > + (input.red +
> > (input.green << 12)) :
> > + ((input.red << 20) +
> > (input.green << 10) +
> > + input.blue);
> > + word1 = input.blue;
> > } else {
> > - diff[0] = (lut[i].red >>
> > shift_bits) -
> > - (lut[i - 1].red >>
> > shift_bits);
> > - diff[1] = (lut[i].green >>
> > shift_bits) -
> > - (lut[i - 1].green >>
> > shift_bits);
> > - diff[2] = (lut[i].blue >>
> > shift_bits) -
> > - (lut[i - 1].blue >>
> > shift_bits);
> > -
> > - word = ((diff[0] & mask) << 20)
> > +
> > - ((diff[1] & mask) <<
> > 10) +
> > - (diff[2] & mask);
> > + struct drm_color_lut diff;
> > +
> > + diff.red = input.red -
> > + ((lut[i - 1].red >>
> > shift_bits) & mask);
> > + diff.green = input.green -
> > + ((lut[i - 1].green
> > > > shift_bits & mask));
> >
> > + diff.blue = input.blue -
> > + ((lut[i - 1].blue
> > > > shift_bits) & mask);
> >
> > +
> > + word = (lut_bits == 12) ?
>
> Ditto.
OK, I'll move this.
>
> > + (input.red +
> > (input.green << 12)) :
> > + (diff.red << 20) +
> > (diff.green << 10) + diff.blue;
> > + word1 = input.blue;
> > }
> > +
> > writel(word, (lut_base + i * 4));
> > + if (lut_bits == 12)
>
> Ditto.
Because only mt8195 has lut1_base register, so I'll declare bool
12bit_mode = (lut_bits == 12) ? true : false; instead and move this to
the patch "drm/mediatek: Add gamma support different lut_bits for other
SoC".
Regards,
Jason-JH.Lin
>
> Regards,
> CK
>
> > + writel(word1, (lut1_base + i *
> > 4));
> > }
> > }
> > }
> > @@ -237,11 +251,20 @@ static const struct mtk_disp_gamma_data
> > mt8183_gamma_driver_data = {
> > .lut_bits = 10,
> > };
> >
> > +static const struct mtk_disp_gamma_data mt8195_gamma_driver_data =
> > {
> > + .lut_diff = true,
> > + .lut_size = 512,
> > + .lut_bits = 10,
> > + .bank_size = 256,
> > +};
> > +
> > static const struct of_device_id mtk_disp_gamma_driver_dt_match[]
> > =
> > {
> > { .compatible = "mediatek,mt8173-disp-gamma",
> > .data = &mt8173_gamma_driver_data},
> > { .compatible = "mediatek,mt8183-disp-gamma",
> > .data = &mt8183_gamma_driver_data},
> > + { .compatible = "mediatek,mt8195-disp-gamma",
> > + .data = &mt8195_gamma_driver_data},
> > {},
> > };
> > MODULE_DEVICE_TABLE(of, mtk_disp_gamma_driver_dt_match);
>
>
--
Jason-JH Lin <jason-jh.lin@xxxxxxxxxxxx>
