Hi, Jason: On Mon, 2022-09-12 at 09:30 +0800, Jason-JH.Lin wrote: > Since the bootlaoder may set the RELAY_MODE to gamma be for the > kerenl, > we have to clear the RELAY_MODE bit to make sure that the gamma is > enabled correctly. > > Fixes: b10023b03082 ("FROMGIT: drm/mediatek: Separate gamma module") Fixes: 69a4237ab1d1 ("drm/mediatek: Separate gamma module") and move this patch to the first patch of this series so this patch could be picked to early stable branch. Regards, CK > Signed-off-by: Jason-JH.Lin <jason-jh.lin@xxxxxxxxxxxx> > --- > drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c > b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c > index d706f76fd30e..15fe2a4f98de 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c > @@ -18,6 +18,7 @@ > #define DISP_GAMMA_EN 0x0000 > #define GAMMA_EN BIT(0) > #define DISP_GAMMA_CFG 0x0020 > +#define RELAY_MODE BIT(0) > #define GAMMA_LUT_EN BIT(1) > #define GAMMA_DITHERING BIT(2) > #define DISP_GAMMA_SIZE 0x0030 > @@ -99,6 +100,7 @@ void mtk_gamma_set_common(struct device *dev, void > __iomem *regs, struct drm_crt > > if (state->gamma_lut) { > reg = readl(regs + DISP_GAMMA_CFG); > + reg = reg & ~RELAY_MODE; > reg = reg | GAMMA_LUT_EN; > writel(reg, regs + DISP_GAMMA_CFG); > lut_base = regs + DISP_GAMMA_LUT;