Hi, Thanks for submitting this patch ! On 08/09/2022 17:51, Stuart Menefy wrote:
VIU_OSD1_CTRL_STAT.GLOBAL_ALPHA is a 9 bit field, so the maximum value is 0x100 not 0xff.
Indeed it's 9bit, but all bits to 1 would be 0x1ff then, but indeed vendor uses : #define OSD_GLOBAL_ALPHA_DEF 0x100
This matches the vendor kernel.
Fixes: bbbe775ec5b5 ("drm: Add support for Amlogic Meson Graphic Controller")
Signed-off-by: Stuart Menefy <stuart.menefy@xxxxxxxxxxxxxxxx> --- drivers/gpu/drm/meson/meson_plane.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/meson/meson_plane.c b/drivers/gpu/drm/meson/meson_plane.c index d5cbc47..45088f0 100644 --- a/drivers/gpu/drm/meson/meson_plane.c +++ b/drivers/gpu/drm/meson/meson_plane.c @@ -163,7 +163,7 @@ static void meson_plane_atomic_update(struct drm_plane *plane,/* Enable OSD and BLK0, set max global alpha */priv->viu.osd1_ctrl_stat = OSD_ENABLE | - (0xFF << OSD_GLOBAL_ALPHA_SHIFT) | + (0x100 << OSD_GLOBAL_ALPHA_SHIFT) | OSD_BLK0_ENABLE;priv->viu.osd1_ctrl_stat2 = readl(priv->io_base +
Reviewed-by: Neil Armstrong <narmstrong@xxxxxxxxxxxx>
