tree: git://anongit.freedesktop.org/drm/drm-misc drm-misc-next head: 5d832b6694e094b176627ed9918a1b21c56fb742 commit: ec491291dc94914cf962dcd399c3e9b43b00a770 [1/1] drm/sun4i: tv: Merge mode_set into atomic_enable config: parisc-randconfig-r003-20220907 (https://download.01.org/0day-ci/archive/20220909/202209090435.Nc6iroRU-lkp@xxxxxxxxx/config) compiler: hppa-linux-gcc (GCC) 12.1.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git remote add drm-misc git://anongit.freedesktop.org/drm/drm-misc git fetch --no-tags drm-misc drm-misc-next git checkout ec491291dc94914cf962dcd399c3e9b43b00a770 # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=parisc SHELL=/bin/bash drivers/gpu/drm/sun4i/ If you fix the issue, kindly add following tag where applicable Reported-by: kernel test robot <lkp@xxxxxxxxx> All error/warnings (new ones prefixed by >>): drivers/gpu/drm/sun4i/sun4i_tv.c: In function 'sun4i_tv_enable': >> drivers/gpu/drm/sun4i/sun4i_tv.c:356:17: error: implicit declaration of function 'drm_atomic_get_new_crtc_state'; did you mean 'drm_atomic_helper_swap_state'? [-Werror=implicit-function-declaration] 356 | drm_atomic_get_new_crtc_state(state, encoder->crtc); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | drm_atomic_helper_swap_state >> drivers/gpu/drm/sun4i/sun4i_tv.c:356:17: warning: initialization of 'struct drm_crtc_state *' from 'int' makes pointer from integer without a cast [-Wint-conversion] cc1: some warnings being treated as errors vim +356 drivers/gpu/drm/sun4i/sun4i_tv.c 349 350 static void sun4i_tv_enable(struct drm_encoder *encoder, 351 struct drm_atomic_state *state) 352 { 353 struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder); 354 struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc); 355 struct drm_crtc_state *crtc_state = > 356 drm_atomic_get_new_crtc_state(state, encoder->crtc); 357 struct drm_display_mode *mode = &crtc_state->mode; 358 const struct tv_mode *tv_mode = sun4i_tv_find_tv_by_mode(mode); 359 360 DRM_DEBUG_DRIVER("Enabling the TV Output\n"); 361 362 /* Enable and map the DAC to the output */ 363 regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG, 364 SUN4I_TVE_EN_DAC_MAP_MASK, 365 SUN4I_TVE_EN_DAC_MAP(0, 1) | 366 SUN4I_TVE_EN_DAC_MAP(1, 2) | 367 SUN4I_TVE_EN_DAC_MAP(2, 3) | 368 SUN4I_TVE_EN_DAC_MAP(3, 4)); 369 370 /* Set PAL settings */ 371 regmap_write(tv->regs, SUN4I_TVE_CFG0_REG, 372 tv_mode->mode | 373 (tv_mode->yc_en ? SUN4I_TVE_CFG0_YC_EN : 0) | 374 SUN4I_TVE_CFG0_COMP_EN | 375 SUN4I_TVE_CFG0_DAC_CONTROL_54M | 376 SUN4I_TVE_CFG0_CORE_DATAPATH_54M | 377 SUN4I_TVE_CFG0_CORE_CONTROL_54M); 378 379 /* Configure the DAC for a composite output */ 380 regmap_write(tv->regs, SUN4I_TVE_DAC0_REG, 381 SUN4I_TVE_DAC0_DAC_EN(0) | 382 (tv_mode->dac3_en ? SUN4I_TVE_DAC0_DAC_EN(3) : 0) | 383 SUN4I_TVE_DAC0_INTERNAL_DAC_37_5_OHMS | 384 SUN4I_TVE_DAC0_CHROMA_0_75 | 385 SUN4I_TVE_DAC0_LUMA_0_4 | 386 SUN4I_TVE_DAC0_CLOCK_INVERT | 387 (tv_mode->dac_bit25_en ? BIT(25) : 0) | 388 BIT(30)); 389 390 /* Configure the sample delay between DAC0 and the other DAC */ 391 regmap_write(tv->regs, SUN4I_TVE_NOTCH_REG, 392 SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(1, 0) | 393 SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(2, 0)); 394 395 regmap_write(tv->regs, SUN4I_TVE_CHROMA_FREQ_REG, 396 tv_mode->chroma_freq); 397 398 /* Set the front and back porch */ 399 regmap_write(tv->regs, SUN4I_TVE_PORCH_REG, 400 SUN4I_TVE_PORCH_BACK(tv_mode->back_porch) | 401 SUN4I_TVE_PORCH_FRONT(tv_mode->front_porch)); 402 403 /* Set the lines setup */ 404 regmap_write(tv->regs, SUN4I_TVE_LINE_REG, 405 SUN4I_TVE_LINE_FIRST(22) | 406 SUN4I_TVE_LINE_NUMBER(tv_mode->line_number)); 407 408 regmap_write(tv->regs, SUN4I_TVE_LEVEL_REG, 409 SUN4I_TVE_LEVEL_BLANK(tv_mode->video_levels->blank) | 410 SUN4I_TVE_LEVEL_BLACK(tv_mode->video_levels->black)); 411 412 regmap_write(tv->regs, SUN4I_TVE_DAC1_REG, 413 SUN4I_TVE_DAC1_AMPLITUDE(0, 0x18) | 414 SUN4I_TVE_DAC1_AMPLITUDE(1, 0x18) | 415 SUN4I_TVE_DAC1_AMPLITUDE(2, 0x18) | 416 SUN4I_TVE_DAC1_AMPLITUDE(3, 0x18)); 417 418 regmap_write(tv->regs, SUN4I_TVE_CB_CR_LVL_REG, 419 SUN4I_TVE_CB_CR_LVL_CB_BURST(tv_mode->burst_levels->cb) | 420 SUN4I_TVE_CB_CR_LVL_CR_BURST(tv_mode->burst_levels->cr)); 421 422 /* Set burst width for a composite output */ 423 regmap_write(tv->regs, SUN4I_TVE_BURST_WIDTH_REG, 424 SUN4I_TVE_BURST_WIDTH_HSYNC_WIDTH(126) | 425 SUN4I_TVE_BURST_WIDTH_BURST_WIDTH(68) | 426 SUN4I_TVE_BURST_WIDTH_BREEZEWAY(22)); 427 428 regmap_write(tv->regs, SUN4I_TVE_CB_CR_GAIN_REG, 429 SUN4I_TVE_CB_CR_GAIN_CB(tv_mode->color_gains->cb) | 430 SUN4I_TVE_CB_CR_GAIN_CR(tv_mode->color_gains->cr)); 431 432 regmap_write(tv->regs, SUN4I_TVE_SYNC_VBI_REG, 433 SUN4I_TVE_SYNC_VBI_SYNC(0x10) | 434 SUN4I_TVE_SYNC_VBI_VBLANK(tv_mode->vblank_level)); 435 436 regmap_write(tv->regs, SUN4I_TVE_ACTIVE_LINE_REG, 437 SUN4I_TVE_ACTIVE_LINE(1440)); 438 439 /* Set composite chroma gain to 50 % */ 440 regmap_write(tv->regs, SUN4I_TVE_CHROMA_REG, 441 SUN4I_TVE_CHROMA_COMP_GAIN_50); 442 443 regmap_write(tv->regs, SUN4I_TVE_12C_REG, 444 SUN4I_TVE_12C_COMP_YUV_EN | 445 SUN4I_TVE_12C_NOTCH_WIDTH_WIDE); 446 447 regmap_write(tv->regs, SUN4I_TVE_RESYNC_REG, 448 SUN4I_TVE_RESYNC_PIXEL(tv_mode->resync_params->pixel) | 449 SUN4I_TVE_RESYNC_LINE(tv_mode->resync_params->line) | 450 (tv_mode->resync_params->field ? 451 SUN4I_TVE_RESYNC_FIELD : 0)); 452 453 regmap_write(tv->regs, SUN4I_TVE_SLAVE_REG, 0); 454 455 sunxi_engine_apply_color_correction(crtc->engine); 456 457 regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG, 458 SUN4I_TVE_EN_ENABLE, 459 SUN4I_TVE_EN_ENABLE); 460 } 461 -- 0-DAY CI Kernel Test Service https://01.org/lkp
