Re: [PATCH] drm/bridge: anx7625: Set HPD irq detect window to 2ms

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On Tue, 6 Sept 2022 at 04:58, Xin Ji <xji@xxxxxxxxxxxxxxxx> wrote:
>
> On Mon, Sep 05, 2022 at 06:48:06PM +0200, Robert Foss wrote:
> > Hi Xin,
> >
> > On Sat, 3 Sept 2022 at 15:09, Xin Ji <xji@xxxxxxxxxxxxxxxx> wrote:
> > >
> > > Some panels trigger HPD irq due to noise, the HPD debounce
> > > may be 1.8ms, exceeding the default irq detect window, ~1.4ms.
> > > This patch set HPD irq detection window to 2ms to
> > > tolerate the HPD noise.
> > >
> > > Signed-off-by: Xin Ji <xji@xxxxxxxxxxxxxxxx>
> > > ---
> > >  drivers/gpu/drm/bridge/analogix/anx7625.c | 14 ++++++++++++++
> > >  drivers/gpu/drm/bridge/analogix/anx7625.h |  6 ++++++
> > >  2 files changed, 20 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c
> > > index c74b5df4cade..0c323b5a1c99 100644
> > > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c
> > > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
> > > @@ -1440,6 +1440,20 @@ static void anx7625_start_dp_work(struct anx7625_data *ctx)
> > >
> > >  static int anx7625_read_hpd_status_p0(struct anx7625_data *ctx)
> > >  {
> > > +       int ret;
> > > +
> > > +       /* Set irq detect window to 2ms */
> > > +       ret = anx7625_reg_write(ctx, ctx->i2c.tx_p2_client,
> > > +                               HPD_DET_TIMER_BIT0_7, HPD_TIME & 0xFF);
> > > +       ret |= anx7625_reg_write(ctx, ctx->i2c.tx_p2_client,
> > > +                                HPD_DET_TIMER_BIT8_15,
> > > +                                (HPD_TIME >> 8) & 0xFF);
> > > +       ret |= anx7625_reg_write(ctx, ctx->i2c.tx_p2_client,
> > > +                                HPD_DET_TIMER_BIT16_23,
> > > +                                (HPD_TIME >> 16) & 0xFF);
> >
> > Does the HPD debounce timer register need to be written for every HPD
> > status read?
> Hi Robert Foss, yes, it is better to set it in every HPD status check, because the
> HPD may be affected by noise, once the chip detect HPD is low, the timer
> register will be automatically set to 1.4ms, so the driver better set it
> in each check loop.
>
> Thanks,
> Xin
> >
> > > +       if (ret < 0)
> > > +               return ret;
> > > +
> > >         return anx7625_reg_read(ctx, ctx->i2c.rx_p0_client, SYSTEM_STSTUS);
> > >  }
> > >
> > > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.h b/drivers/gpu/drm/bridge/analogix/anx7625.h
> > > index e257a84db962..14f33d6be289 100644
> > > --- a/drivers/gpu/drm/bridge/analogix/anx7625.h
> > > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.h
> > > @@ -132,6 +132,12 @@
> > >  #define I2S_SLAVE_MODE 0x08
> > >  #define AUDIO_LAYOUT   0x01
> > >
> > > +#define HPD_DET_TIMER_BIT0_7   0xea
> > > +#define HPD_DET_TIMER_BIT8_15  0xeb
> > > +#define HPD_DET_TIMER_BIT16_23 0xec
> > > +/* HPD debounce time 2ms for 27M clock */
> > > +#define HPD_TIME               54000
> > > +
> > >  #define AUDIO_CONTROL_REGISTER 0xe6
> > >  #define TDM_TIMING_MODE 0x08
> > >
> > > --
> > > 2.25.1
> > >

Reviewed-by: Robert Foss <robert.foss@xxxxxxxxxx>

Applied to drm-misc-next.



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