On 30/07/2022 12:17, Akhil P Oommen wrote:
Add support to allow soc specific clk drivers to specify a custom reset
operation. A consumer-driver of the reset framework can call
"reset_control_reset()" api to trigger this.
Signed-off-by: Akhil P Oommen <quic_akhilpo@xxxxxxxxxxx>
---
drivers/clk/qcom/reset.c | 6 ++++++
drivers/clk/qcom/reset.h | 2 ++
2 files changed, 8 insertions(+)
diff --git a/drivers/clk/qcom/reset.c b/drivers/clk/qcom/reset.c
index 819d194..4782bf1 100644
--- a/drivers/clk/qcom/reset.c
+++ b/drivers/clk/qcom/reset.c
@@ -13,6 +13,12 @@
static int qcom_reset(struct reset_controller_dev *rcdev, unsigned long id)
{
+ struct qcom_reset_controller *rst = to_qcom_reset_controller(rcdev);
+ const struct qcom_reset_map *map = &rst->reset_map[id];
+
+ if (map->op)
+ return map->op(map);
This looks like a hack. For example, assert() and deassert() would still
follow the usual pattern of updating the bits. Please at least make them
return -EOPNOTSUP if map->op is defined.
A slightly better solution would be to make qcom_reset implementation
optional (and depending on desc->num_resets being greater than 0). Then
you can register your own reset controller implementation from the gpucc
driver.
+
rcdev->ops->assert(rcdev, id);
udelay(1);
rcdev->ops->deassert(rcdev, id);
diff --git a/drivers/clk/qcom/reset.h b/drivers/clk/qcom/reset.h
index 2a08b5e..295deeb 100644
--- a/drivers/clk/qcom/reset.h
+++ b/drivers/clk/qcom/reset.h
@@ -11,6 +11,8 @@
struct qcom_reset_map {
unsigned int reg;
u8 bit;
+ int (*op)(const struct qcom_reset_map *map);
+ void *priv;
};
struct regmap;
--
With best wishes
Dmitry