On 7/27/22 05:56, Marco Felsch wrote:
Hi Marek, Liu,
Hi,
On 22-07-26, Liu Ying wrote:
On Tue, 2022-07-26 at 16:19 +0200, Marek Vasut wrote:
On 7/26/22 11:43, Marco Felsch wrote:
FIFO underruns are seen if a AXI bus master with a higher priority
do a
lot of memory access. Increase the burst size to 256B to avoid such
underruns and to improve the memory access efficiency.
Sigh, this again ...
I know.. we also tried the PANIC mode but this somehow didn't worked as
documented. So this was the only way to reduce the underruns without
adapting the interconnect prio for the hdmi-lcdif.
Right, the PANIC watermark didn't work on mxsfb for me either when it
came to FIFO underruns.
[...]
+ * are two known values:
+ * 1 - 128Byte
+ * 2 - 256Byte
+ *
+ * Downstream has set the burst size to 256Byte to improve the
memory
+ * efficiency so set it here too. This also reduces the FIFO
underrun
+ * possibility.
+ */
+ ctrl = CTRLDESCL0_3_P_SIZE(2) | CTRLDESCL0_3_T_SIZE(2) |
+ CTRLDESCL0_3_PITCH(lcdif->crtc.primary->state->fb-
pitches[0]);
+ writel(ctrl, lcdif->base + LCDC_V8_CTRLDESCL0_3);
Nit: I would write the register directly, instead of caching the value
in ctrl.
IMHO it's more readable that way.
I agree, and we can also add to the variable in case there are more
undocumented bits.
