Disable the main link PHYs and put them into reset when the main link is disabled. When the PHYs stay enabled while the rest of the DP link circuits are disabled there is some noise on the data lanes, which some displays try to lock onto, waking them up from their low power state. Signed-off-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx> --- drivers/gpu/drm/bridge/tc358767.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index fd4936215b55..615b4988bf34 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -1249,7 +1249,13 @@ static int tc_main_link_disable(struct tc_data *tc) if (ret) return ret; - return regmap_write(tc->regmap, DP0CTL, 0); + ret = regmap_write(tc->regmap, DP0CTL, 0); + if (ret) + return ret; + + return regmap_update_bits(tc->regmap, DP_PHY_CTRL, + PHY_M0_RST | PHY_M1_RST | PHY_M0_EN, + PHY_M0_RST | PHY_M1_RST); } static int tc_dsi_rx_enable(struct tc_data *tc) -- 2.30.2
