Hi, On Fri, 1 Jul 2022 14:56:31 +0800, Liu Ying wrote: > This series contains three fixes for the fsl-ldb bridge driver. > > Patch 1/3 fixes mode clock rate validation. > Patch 2/3 fixes LVDS dual link mode. > Patch 3/3 fixes input data enable signal polarity. > > Liu Ying (3): > drm/bridge: fsl-ldb: Fix mode clock rate validation > drm/bridge: fsl-ldb: Enable split mode for LVDS dual link > drm/bridge: fsl-ldb: Drop DE signal polarity inversion > > [...] Thanks, Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-fixes) [1/3] drm/bridge: fsl-ldb: Fix mode clock rate validation https://cgit.freedesktop.org/drm/drm-misc/commit/?id=591129d3db266648823bb953ebbc28c92e059bf3 [2/3] drm/bridge: fsl-ldb: Enable split mode for LVDS dual link https://cgit.freedesktop.org/drm/drm-misc/commit/?id=57ef278ef125e9188474a164f35dcffc69836d01 [3/3] drm/bridge: fsl-ldb: Drop DE signal polarity inversion https://cgit.freedesktop.org/drm/drm-misc/commit/?id=1dbc790b4d416dacb124a6acd05f88a0bcf3be39 -- Neil
