Quoting Kuogee Hsieh (2022-06-24 10:15:11) > Current the index (dp->id) of DP descriptor table (scxxxx_dp_cfg[]) are tightly > coupled with DP controller_id. This means DP use controller id 0 must be placed > at first entry of DP descriptor table (scxxxx_dp_cfg[]). Otherwise the internal > INTF will mismatch controller_id. This will cause controller kickoff wrong > interface timing engine and cause dpu_encoder_phys_vid_wait_for_commit_done > vblank timeout error. > > This patch add controller_id field into struct msm_dp_desc to break the tightly > coupled relationship between index (dp->id) of DP descriptor table with DP > controller_id. Please no. This reverts the intention of commit bb3de286d992 ("drm/msm/dp: Support up to 3 DP controllers") A new enum is introduced to document the connection between the instances referenced in the dpu_intf_cfg array and the controllers in the DP driver and sc7180 is updated. It sounds like the intent of that commit failed to make a strong enough connection. Now it needs to match the INTF number as well? I can't really figure out what is actually wrong, because this patch undoes that intentional tight coupling. Is the next patch the important part that flips the order of the two interfaces?