The msm_dp_modeset_init() is used to attach DP driver to drm bridge chain.
msm_dp_modeset_init() is executed in the order of index (dp->id) of DP
descriptor table.
Currently, DP is placed at first entry (dp->id = 0) of descriptor table
and eDP is placed at secondary entry (dp->id = 1 ) of descriptor table.
This means DP will be placed at head of bridge chain and eDP will be
placed right after DP at bridge chain.
Drm screen update is happen sequentially in the order from head to tail
of bridge chain. Therefore external DP display will have screen updated
happen before primary eDP display if external DP display presented.
This is wrong screen update order and cause one frame time screen
corruption happen at primary display during external DP plugged in.
This patch place eDP at first entry (dp->id = 0) of descriptor table and
place DP at secondary entry (dp->id = 1) to have primary eDP locate at
head of bridge chain. This correct screen update order and eliminated
the one frame time screen corruption happen d at primary display.
Signed-off-by: Kuogee Hsieh <quic_khsieh@xxxxxxxxxxx>
---
drivers/gpu/drm/msm/dp/dp_display.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c
index a87a9d8..2755ff3 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -143,10 +143,10 @@ static const struct msm_dp_config sc7180_dp_cfg = {
static const struct msm_dp_config sc7280_dp_cfg = {
.descs = (const struct msm_dp_desc[]) {
- { .io_start = 0x0ae90000, .connector_type = DRM_MODE_CONNECTOR_DisplayPort,
- .controller_id = MSM_DP_CONTROLLER_0, .wide_bus_en = true },
{ .io_start = 0x0aea0000, .connector_type = DRM_MODE_CONNECTOR_eDP,
.controller_id = MSM_DP_CONTROLLER_1, .wide_bus_en = true },
+ { .io_start = 0x0ae90000, .connector_type = DRM_MODE_CONNECTOR_DisplayPort,
+ .controller_id = MSM_DP_CONTROLLER_0, .wide_bus_en = true },
},
.num_descs = 2,
};
--
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