On Mon, 2022-06-13 at 12:39 +0200, AngeloGioacchino Del Regno wrote: > Il 13/06/22 09:26, Bo-Chen Chen ha scritto: > > From: Markus Schneider-Pargmann <msp@xxxxxxxxxxxx> > > > > This is a new driver that supports the integrated DisplayPort phy > > for > > mediatek SoCs, especially the mt8195. The phy is integrated into > > the > > DisplayPort controller and will be created by the mtk-dp driver. > > This > > driver expects a struct regmap to be able to work on the same > > registers > > as the DisplayPort controller. It sets the device data to be the > > struct > > phy so that the DisplayPort controller can easily work with it. > > > > The driver does not have any devicetree bindings because the > > datasheet > > does not list the controller and the phy as distinct units. > > > > The interaction with the controller can be covered by the configure > > callback of the phy framework and its displayport parameters. > > > > Signed-off-by: Markus Schneider-Pargmann <msp@xxxxxxxxxxxx> > > Signed-off-by: Guillaume Ranquet <granquet@xxxxxxxxxxxx> > > [Bo-Chen: Modify reviewers' comments.] > > Signed-off-by: Bo-Chen Chen <rex-bc.chen@xxxxxxxxxxxx> > > There's no power_on()/power_off() callbacks and looks a bit weird, > but it's > also right... the only thing that's missing, IMO, is a comment in the > actual > file explaining that power for this PHY is always on when the DP > block is on > and that no PHY specific power sequence has to be carried on (being > managed > elsewhere and strongly tied to the specific DP IP). > > Besides that, > > Reviewed-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@xxxxxxxxxxxxx> > Hello Angelo, there is no power-on/off setting register for dp-phy because of the hardware design. Therefore, we power-on/off using enable/disable power domain. You can see the function mtk_dp_suspend/mtk_dp_resume in mtk-dp.c "pm_runtime_get_sync/pm_runtime_put_sync". When the power domain is disable, the phy is also diabled. BRs, Bo-Chen
