[PATCH 02/19] drm/gma500: Unify *_lvds_set_backlight()

[Patrik Jakobsson <patrik.r.jakobsson@xxxxxxxxx>]

These functions do the same thing so unify them into one.

Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@xxxxxxxxx>
---
 drivers/gpu/drm/gma500/cdv_intel_lvds.c | 29 ++--------------------
 drivers/gpu/drm/gma500/gma_lvds.c       | 26 ++++++++++++++++++++
 drivers/gpu/drm/gma500/gma_lvds.h       |  1 +
 drivers/gpu/drm/gma500/psb_intel_lvds.c | 32 ++-----------------------
 4 files changed, 31 insertions(+), 57 deletions(-)

diff --git a/drivers/gpu/drm/gma500/cdv_intel_lvds.c b/drivers/gpu/drm/gma500/cdv_intel_lvds.c
index 0c7c4a539e50..615570de82b0 100644
--- a/drivers/gpu/drm/gma500/cdv_intel_lvds.c
+++ b/drivers/gpu/drm/gma500/cdv_intel_lvds.c
@@ -53,31 +53,6 @@ struct cdv_intel_lvds_priv {
 	uint32_t saveBLC_PWM_CTL;
 };
 
-/*
- * Sets the backlight level.
- *
- * level backlight level, from 0 to gma_lvds_get_max_backlight().
- */
-static void cdv_intel_lvds_set_backlight(struct drm_device *dev, int level)
-{
-	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
-	u32 blc_pwm_ctl;
-
-	if (gma_power_begin(dev, false)) {
-		blc_pwm_ctl =
-			REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
-		REG_WRITE(BLC_PWM_CTL,
-				(blc_pwm_ctl |
-				(level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
-		gma_power_end(dev);
-	} else {
-		blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL &
-				~BACKLIGHT_DUTY_CYCLE_MASK;
-		dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
-					(level << BACKLIGHT_DUTY_CYCLE_SHIFT));
-	}
-}
-
 /*
  * Sets the power state for the panel.
  */
@@ -97,10 +72,10 @@ static void cdv_intel_lvds_set_power(struct drm_device *dev,
 			pp_status = REG_READ(PP_STATUS);
 		} while ((pp_status & PP_ON) == 0);
 
-		cdv_intel_lvds_set_backlight(dev,
+		gma_lvds_set_backlight(dev,
 				dev_priv->mode_dev.backlight_duty_cycle);
 	} else {
-		cdv_intel_lvds_set_backlight(dev, 0);
+		gma_lvds_set_backlight(dev, 0);
 
 		REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
 			  ~POWER_TARGET_ON);
diff --git a/drivers/gpu/drm/gma500/gma_lvds.c b/drivers/gpu/drm/gma500/gma_lvds.c
index 0b646c7c7432..5b041fab82ba 100644
--- a/drivers/gpu/drm/gma500/gma_lvds.c
+++ b/drivers/gpu/drm/gma500/gma_lvds.c
@@ -31,4 +31,30 @@ u32 gma_lvds_get_max_backlight(struct drm_device *dev)
 	return retval;
 }
 
+/*
+ * Sets the backlight level.
+ *
+ * level: backlight level, from 0 to gma_lvds_get_max_backlight().
+ */
+void gma_lvds_set_backlight(struct drm_device *dev, int level)
+{
+	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
+	u32 blc_pwm_ctl;
+
+	if (gma_power_begin(dev, false)) {
+		blc_pwm_ctl = REG_READ(BLC_PWM_CTL);
+		blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;
+		REG_WRITE(BLC_PWM_CTL,
+				(blc_pwm_ctl |
+				(level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
+		dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
+					(level << BACKLIGHT_DUTY_CYCLE_SHIFT));
+		gma_power_end(dev);
+	} else {
+		blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL &
+				~BACKLIGHT_DUTY_CYCLE_MASK;
+		dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
+					(level << BACKLIGHT_DUTY_CYCLE_SHIFT));
+	}
+}
 
diff --git a/drivers/gpu/drm/gma500/gma_lvds.h b/drivers/gpu/drm/gma500/gma_lvds.h
index 2a9ce8ee3fa7..f26cc69b6caa 100644
--- a/drivers/gpu/drm/gma500/gma_lvds.h
+++ b/drivers/gpu/drm/gma500/gma_lvds.h
@@ -8,5 +8,6 @@
 #define _GMA_LVDS_H
 
 u32 gma_lvds_get_max_backlight(struct drm_device *dev);
+void gma_lvds_set_backlight(struct drm_device *dev, int level);
 
 #endif
diff --git a/drivers/gpu/drm/gma500/psb_intel_lvds.c b/drivers/gpu/drm/gma500/psb_intel_lvds.c
index 371c202a15ce..a304f840b127 100644
--- a/drivers/gpu/drm/gma500/psb_intel_lvds.c
+++ b/drivers/gpu/drm/gma500/psb_intel_lvds.c
@@ -148,33 +148,6 @@ void psb_intel_lvds_set_brightness(struct drm_device *dev, int level)
 		psb_lvds_pwm_set_brightness(dev, level);
 }
 
-/*
- * Sets the backlight level.
- *
- * level: backlight level, from 0 to gma_lvds_get_max_backlight().
- */
-static void psb_intel_lvds_set_backlight(struct drm_device *dev, int level)
-{
-	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
-	u32 blc_pwm_ctl;
-
-	if (gma_power_begin(dev, false)) {
-		blc_pwm_ctl = REG_READ(BLC_PWM_CTL);
-		blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;
-		REG_WRITE(BLC_PWM_CTL,
-				(blc_pwm_ctl |
-				(level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
-		dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
-					(level << BACKLIGHT_DUTY_CYCLE_SHIFT));
-		gma_power_end(dev);
-	} else {
-		blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL &
-				~BACKLIGHT_DUTY_CYCLE_MASK;
-		dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
-					(level << BACKLIGHT_DUTY_CYCLE_SHIFT));
-	}
-}
-
 /*
  * Sets the power state for the panel.
  */
@@ -196,10 +169,9 @@ static void psb_intel_lvds_set_power(struct drm_device *dev, bool on)
 			pp_status = REG_READ(PP_STATUS);
 		} while ((pp_status & PP_ON) == 0);
 
-		psb_intel_lvds_set_backlight(dev,
-					     mode_dev->backlight_duty_cycle);
+		gma_lvds_set_backlight(dev, mode_dev->backlight_duty_cycle);
 	} else {
-		psb_intel_lvds_set_backlight(dev, 0);
+		gma_lvds_set_backlight(dev, 0);
 
 		REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
 			  ~POWER_TARGET_ON);
-- 
2.36.1