Re: [PATCH v2] drm: rcar-du: Fix Alpha blending issue on Gen3

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Quoting Biju Das (2022-04-26 09:41:57)
> From: LUU HOAI <hoai.luu.ub@xxxxxxxxxxx>
> 
> As per R-Car-Gen3_Common_OPC_Customer_Notifications_V30.1.pdf,
> unexpected image output(such as incorrect colors or planes being
> invisible) can happen on the below conditions, as PnALPHAR register
> is not initialized by reset.
> 
> When alpha blending (PpMRm.PpSPIM=0b101) is performed and:
>         •two Planes are enabled on any DUn (n=0,1,2,3)
>                 oDSPRn= 0x0000 0031 or 0x0000 0013
>         •or DU0 and DU1 is used for display at the same time
>                 oDSPR0= 0x0000 0001 and DSPR1= 0x0000 0003
>                 oDSPR0= 0x0000 0003 and DSPR1= 0x0000 0001
>         •or DU2 and DU3(H3 Only) is used for display at the same time
>                 oDSPR2= 0x0000 0001 and DSPR3= 0x0000 0003
>                 oDSPR2= 0x0000 0003 and DSPR3= 0x0000 0001
> 
> This patch set PnALPHAR register to 0 to avoid this issue.
> 
> Signed-off-by: LUU HOAI <hoai.luu.ub@xxxxxxxxxxx>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> ---
> v1->v2:
>  * Updated commit description
>  * Updated the code comments
> ---
>  drivers/gpu/drm/rcar-du/rcar_du_plane.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.c b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
> index f214a8b6cfd3..aa80c44dd8d7 100644
> --- a/drivers/gpu/drm/rcar-du/rcar_du_plane.c
> +++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
> @@ -510,6 +510,18 @@ static void rcar_du_plane_setup_format_gen3(struct rcar_du_group *rgrp,
>  
>         rcar_du_plane_write(rgrp, index, PnDDCR4,
>                             state->format->edf | PnDDCR4_CODE);
> +
> +       /*
> +        * On Gen3, some DU channels have two planes, each being wired to a
> +        * separate VSPD instance. The DU can then blend two planes. While
> +        * this feature isn't used by the driver, issues related to alpha
> +        * blending (such as incorrect colors or planes being invisible) may
> +        * still occur if the PnALPHAR register has a stale value. Set the
> +        * register to 0 to avoid this.
> +        */
> +

Sounds reasonable.

> +       /* TODO: Check if alpha-blending should be disabled in PnMR. */

How will this be done? Do you have a specific test in mind to determine
if it causes issues? Or does it need validating through the hardware
teams?



> +       rcar_du_plane_write(rgrp, index, PnALPHAR, 0);


Reviewed-by: Kieran Bingham <kieran.bingham+renesas@xxxxxxxxxxxxxxxx>

>  }
>  
>  static void rcar_du_plane_setup_format(struct rcar_du_group *rgrp,
> -- 
> 2.25.1
>




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