Hi, Nancy:
On Tue, 2022-05-03 at 18:23 +0800, Nancy.Lin wrote:
> Add mmsys for support 64 reset bits. It is a preparation for MT8195
> vdosys1 HW reset. MT8195 vdosys1 has more than 32 reset bits.
>
> 1. Add the number of reset bits in mmsys private data
> 2. move the whole "reset register code section" behind the
> "get mmsys->data" code section for getting the num_resets in mmsys-
> >data.
Reviewed-by: CK Hu <ck.hu@xxxxxxxxxxxx>
>
> Signed-off-by: Nancy.Lin <nancy.lin@xxxxxxxxxxxx>
> ---
> drivers/soc/mediatek/mtk-mmsys.c | 38 ++++++++++++++++++++--------
> ----
> drivers/soc/mediatek/mtk-mmsys.h | 1 +
> 2 files changed, 25 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-mmsys.c
> b/drivers/soc/mediatek/mtk-mmsys.c
> index cd92db3d36fa..6600185dd9a4 100644
> --- a/drivers/soc/mediatek/mtk-mmsys.c
> +++ b/drivers/soc/mediatek/mtk-mmsys.c
> @@ -20,6 +20,8 @@
> #include "mt8195-mmsys.h"
> #include "mt8365-mmsys.h"
>
> +#define MMSYS_SW_RESET_PER_REG 32
> +
> static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data =
> {
> .clk_driver = "clk-mt2701-mm",
> .routes = mmsys_default_routing_table,
> @@ -86,6 +88,7 @@ static const struct mtk_mmsys_driver_data
> mt8173_mmsys_driver_data = {
> .routes = mmsys_default_routing_table,
> .num_routes = ARRAY_SIZE(mmsys_default_routing_table),
> .sw0_rst_offset = MT8183_MMSYS_SW0_RST_B,
> + .num_resets = 32,
> };
>
> static const struct mtk_mmsys_match_data mt8173_mmsys_match_data = {
> @@ -100,6 +103,7 @@ static const struct mtk_mmsys_driver_data
> mt8183_mmsys_driver_data = {
> .routes = mmsys_mt8183_routing_table,
> .num_routes = ARRAY_SIZE(mmsys_mt8183_routing_table),
> .sw0_rst_offset = MT8183_MMSYS_SW0_RST_B,
> + .num_resets = 32,
> };
>
> static const struct mtk_mmsys_match_data mt8183_mmsys_match_data = {
> @@ -114,6 +118,7 @@ static const struct mtk_mmsys_driver_data
> mt8186_mmsys_driver_data = {
> .routes = mmsys_mt8186_routing_table,
> .num_routes = ARRAY_SIZE(mmsys_mt8186_routing_table),
> .sw0_rst_offset = MT8186_MMSYS_SW0_RST_B,
> + .num_resets = 32,
> };
>
> static const struct mtk_mmsys_match_data mt8186_mmsys_match_data = {
> @@ -284,13 +289,18 @@ static int mtk_mmsys_reset_update(struct
> reset_controller_dev *rcdev, unsigned l
> {
> struct mtk_mmsys *mmsys = container_of(rcdev, struct mtk_mmsys,
> rcdev);
> unsigned long flags;
> + u32 offset;
> +
> + offset = (id / MMSYS_SW_RESET_PER_REG) * sizeof(u32);
> + id = id % MMSYS_SW_RESET_PER_REG;
>
> spin_lock_irqsave(&mmsys->lock, flags);
>
> if (assert)
> - mtk_mmsys_write_reg(mmsys, mmsys->data->sw0_rst_offset,
> BIT(id), 0, NULL);
> + mtk_mmsys_write_reg(mmsys, mmsys->data->sw0_rst_offset
> + offset, BIT(id), 0, NULL);
> else
> - mtk_mmsys_write_reg(mmsys, mmsys->data->sw0_rst_offset,
> BIT(id), BIT(id), NULL);
> + mtk_mmsys_write_reg(mmsys, mmsys->data->sw0_rst_offset
> + offset, BIT(id), BIT(id),
> + NULL);
>
> spin_unlock_irqrestore(&mmsys->lock, flags);
>
> @@ -347,18 +357,6 @@ static int mtk_mmsys_probe(struct
> platform_device *pdev)
> return ret;
> }
>
> - spin_lock_init(&mmsys->lock);
> -
> - mmsys->rcdev.owner = THIS_MODULE;
> - mmsys->rcdev.nr_resets = 32;
> - mmsys->rcdev.ops = &mtk_mmsys_reset_ops;
> - mmsys->rcdev.of_node = pdev->dev.of_node;
> - ret = devm_reset_controller_register(&pdev->dev, &mmsys-
> >rcdev);
> - if (ret) {
> - dev_err(&pdev->dev, "Couldn't register mmsys reset
> controller: %d\n", ret);
> - return ret;
> - }
> -
> res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> if (!res) {
> dev_err(dev, "Couldn't get mmsys resource\n");
> @@ -380,6 +378,18 @@ static int mtk_mmsys_probe(struct
> platform_device *pdev)
> mmsys->data = match_data->drv_data[0];
> }
>
> + spin_lock_init(&mmsys->lock);
> +
> + mmsys->rcdev.owner = THIS_MODULE;
> + mmsys->rcdev.nr_resets = mmsys->data->num_resets;
> + mmsys->rcdev.ops = &mtk_mmsys_reset_ops;
> + mmsys->rcdev.of_node = pdev->dev.of_node;
> + ret = devm_reset_controller_register(&pdev->dev, &mmsys-
> >rcdev);
> + if (ret) {
> + dev_err(&pdev->dev, "Couldn't register mmsys reset
> controller: %d\n", ret);
> + return ret;
> + }
> +
> #if IS_REACHABLE(CONFIG_MTK_CMDQ)
> ret = cmdq_dev_get_client_reg(dev, &mmsys->cmdq_base, 0);
> if (ret)
> diff --git a/drivers/soc/mediatek/mtk-mmsys.h
> b/drivers/soc/mediatek/mtk-mmsys.h
> index f01ba206481d..20a271b80b3b 100644
> --- a/drivers/soc/mediatek/mtk-mmsys.h
> +++ b/drivers/soc/mediatek/mtk-mmsys.h
> @@ -92,6 +92,7 @@ struct mtk_mmsys_driver_data {
> const struct mtk_mmsys_routes *routes;
> const unsigned int num_routes;
> const u16 sw0_rst_offset;
> + const u32 num_resets;
> };
>
> struct mtk_mmsys_match_data {
