Hi Biju,
On Fri, Apr 22, 2022 at 11:31 AM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> > Subject: Re: [PATCH v3 1/4] dt-bindings: display: Document Renesas RZ/G2L
> > DU bindings
> > On Fri, Apr 22, 2022 at 10:11 AM Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> > wrote:
> > > > Subject: Re: [PATCH v3 1/4] dt-bindings: display: Document Renesas
> > > > RZ/G2L DU bindings On Thu, Apr 21, 2022 at 6:31 PM Biju Das
> > > > <biju.das.jz@xxxxxxxxxxxxxx>
> > > > wrote:
> > > > > The RZ/G2L LCD controller is composed of Frame Compression
> > > > > Processor (FCPVD), Video Signal Processor (VSPD), and Display Unit
> > (DU).
> > > > >
> > > > > The DU module supports the following hardware features − Display
> > > > > Parallel Interface (DPI) and MIPI LINK Video Interface − Display
> > > > > timing master − Generates video timings − Selecting the polarity
> > > > > of output DCLK, HSYNC, VSYNC, and DE − Supports Progressive −
> > > > > Input data format (from VSPD): RGB888, RGB666 − Output data
> > > > > format: same as Input data format − Supporting Full HD (1920
> > > > > pixels x 1080 lines) for MIPI-DSI Output − Supporting WXGA (1280
> > > > > pixels x 800 lines) for Parallel Output
> > > > >
> > > > > This patch document DU module found on RZ/G2L LCDC.
> > > > >
> > > > > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> > > >
> > > > Thanks for your patch!
> > > >
> > > > > --- /dev/null
> > > > > +++ b/Documentation/devicetree/bindings/display/renesas,rzg2l-du.y
> > > > > +++ aml
> > > > > @@ -0,0 +1,159 @@
> > > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML
> > > > > +1.2
> > > > > +---
> > > > > +$id:
> > > > > +
> > > > > +title: Renesas RZ/G2L Display Unit (DU)
> > > > > +
> > > > > +maintainers:
> > > > > + - Laurent Pinchart <laurent.pinchart+renesas@xxxxxxxxxxxxxxxx>
> > > > > + - Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> > > > > +
> > > > > +description: |
> > > > > + These DT bindings describe the Display Unit embedded in the
> > > > > +Renesas RZ/G2L
> > > > > + and RZ/V2L SoCs.
> > > > > +
> > > > > +properties:
> > > > > + compatible:
> > > > > + enum:
> > > > > + - renesas,du-r9a07g044c # for RZ/G2LC compatible DU
> > > > > + - renesas,du-r9a07g044l # for RZ/G2L compatible DU
> > > >
> > > > Please use the format "<manuf>,<soc>-<modulo>" for new bindings.
> > > >
> > >
> > > OK.
> > >
> > > > I thought there was no need to differentiate RZ/G2LC and RZ/G2L, as
> > > > the only difference is a wiring difference due to the limited number
> > > > of pins on the RZ/G2LC package, as per your confirmation[1]?
> > > > Hence please just use "renesas,r9a07g044-du".
> > >
> > > I cross checked HW manual, on the overview section(page 69) Supported
> > > DU channels on various SoC's are as below
> > >
> > > RZ/{G2L,V2L}
> > > − 1 channel MIPI DSI interface or 1channel parallel output interface
> > > selectable,
> > >
> > > RZ/G2LC
> > > − 1 channel MIPI DSI interface
> > >
> > > RZ/G2UL ( From RZ/G2UL hardware manual overview) − 1 channel parallel
> > > output interface.
> > >
> > > >
> > > > Do you want a family-specific compatible value ("rzg2l-"), as this
> > > > IP block is shared by (at least) RZ/GL(C), RZ/V2L, and RZ/G2UL?
> > >
> > > May be will conclude after the above discussion??
> >
> > I don't insist on family-specific compatible values here, as the DUs on
> > RZ/G2UL and RZ/V2L may differ.
> > But RZ/G2L and RZ/G2LC are identical otherwise...
>
> OK, Will use
>
> compatible:
> items:
> - enum:
> - renesas,r9a07g044-du # RZ/G2{L,LC}
> - const: renesas,rzg2l-du
Please drop "renesas,rzg2l-du"...
> >
> > > > > +allOf:
> > > > > + - if:
> > > > > + properties:
> > > > > + compatible:
> > > > > + contains:
> > > > > + enum:
> > > > > + - renesas,du-r9a07g044c
> > > > > + then:
> > > > > + properties:
> > > > > + ports:
> > > > > + properties:
> > > > > + port@0:
> > > > > + description: DSI 0
> > > > > + required:
> > > > > + - port@0
> > > > > +
> > > > > + - if:
> > > > > + properties:
> > > > > + compatible:
> > > > > + contains:
> > > > > + enum:
> > > > > + - renesas,du-r9a07g044l
> > > > > + then:
> > > > > + properties:
> > > > > + ports:
> > > > > + properties:
> > > > > + port@0:
> > > > > + description: DPAD 0
> > > > > + port@1:
> > > > > + description: DSI 0
> > > > > + required:
> > > > > + - port@0
> > > > > + - port@1
> > > >
> > > > Having different port numbers for the common DSI0 output indeed
> > > > complicates matters ;-)
> > >
> > > But we could delete as per [1] for RZ/G2LC where it supports only DSI and
> > [2] for RZ/G2UL where it supports only DPI, right?
> >
> > Yes we can. But as the internal hardware is the same, I think we should
> > keep the port numbers the same on RZ/G2L and RZ/G2LC.
>
> OK, Will keep the same port number for both RZ/G2L and RZ/G2LC.
>
> >
> > For RZ/V2L, you probably want to treat it exactly the same as RZ/G2L, i.e.,
> > the same port numbering.
>
> OK.
>
> >
> > For RZ/G2UL, you can use a different numbering, assuming no family-specific
> > compatible value is introduced.
>
> OK.
... as that will interfere here. If the numbering will be SoC-specific,
the driver has to match on the SoC-specific compatible value anyway.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
