On 19-04-22, 09:08, Liu Ying wrote: > Hi, > > This is the v8 series to add i.MX8qxp LVDS PHY mode support for the Mixel > PHY in the Freescale i.MX8qxp SoC. > > The Mixel PHY is MIPI DPHY + LVDS PHY combo, which can works in either > MIPI DPHY mode or LVDS PHY mode. The PHY mode is controlled by i.MX8qxp > SCU firmware. The PHY driver would call a SCU function to configure the > mode. > > The PHY driver is already supporting the Mixel MIPI DPHY in i.MX8mq SoC, > where it appears to be a single MIPI DPHY. > > > Patch 1/5 sets PHY mode in the Northwest Logic MIPI DSI host controller > bridge driver, since i.MX8qxp SoC embeds this controller IP to support > MIPI DSI displays together with the Mixel PHY. > > Patch 2/5 allows LVDS PHYs to be configured through the generic PHY functions > and through a custom structure added to the generic PHY configuration union. > > Patch 3/5 converts mixel,mipi-dsi-phy plain text dt binding to json-schema. > > Patch 4/5 adds dt binding support for the Mixel combo PHY in i.MX8qxp SoC. > > Patch 5/5 adds the i.MX8qxp LVDS PHY mode support in the Mixel PHY driver. Applied patch 2-5 to phy-next, thanks -- ~Vinod
