ED103TC2 is a 10.3" 1872x1404 eInk panel which supports up to 16 levels of grayscale and an 85 Hz frame rate. The timings and polarities here were taken from the manufacturer's datasheet. Since this panel is an electrophoretic display (EPD), the color depth is independent from the bus width. Instead, it is largely determined by the number of frames in the selected waveform. Each pixel uses two parallel data lines to specify one of only three states each frame: positive, negative, or no voltage. This specific panel has a 16-bit data bus, allowing it to update 8 pixels during each source driver (horizontal) clock cycle. As a result, the horizontal timings given in the datasheet were all multiplied by 8 to convert the units from clock cycles to pixels. Since the 16-bit data bus is double the width of the usual 8-bit bus used by eInk panels, the source driver clock will be half the usual frequency. This is signified by the DRM_MODE_FLAG_CLKDIV2 flag. The hskew parameter provides the spacing between the horizontal sync puls and the gate driver (vertical) clock pulse. This spacing is symmetrical on both sides, so it can be used to compute the gate driver clock pulse width. Datasheet: https://files.pine64.org/doc/quartz64/Eink%20P-511-828-V1_ED103TC2%20Formal%20Spec%20V1.0_20190514.pdf Signed-off-by: Samuel Holland <samuel@xxxxxxxxxxxx> --- drivers/gpu/drm/panel/panel-simple.c | 31 ++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index a34f4198a534..c6b104ba01ee 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1686,6 +1686,34 @@ static const struct panel_desc edt_etmv570g2dhu = { .connector_type = DRM_MODE_CONNECTOR_DPI, }; +static const struct drm_display_mode eink_ed103tc2_mode = { + .clock = 266693, + .hdisplay = 1872, + .hsync_start = 1872 + 184, + .hsync_end = 1872 + 184 + 88, + .htotal = 1872 + 184 + 88 + 64, + .hskew = 136, + .vdisplay = 1404, + .vsync_start = 1404 + 12, + .vsync_end = 1404 + 12 + 1, + .vtotal = 1404 + 12 + 1 + 4, + .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC | + DRM_MODE_FLAG_HSKEW | DRM_MODE_FLAG_CLKDIV2, +}; + +static const struct panel_desc eink_ed103tc2 = { + .modes = &eink_ed103tc2_mode, + .num_modes = 1, + .bpc = 4, + .size = { + .width = 210, + .height = 157, + }, + .bus_format = MEDIA_BUS_FMT_FIXED, + .bus_flags = DRM_BUS_FLAG_DE_LOW | DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE, + .connector_type = DRM_MODE_CONNECTOR_DPI, +}; + static const struct display_timing eink_vb3300_kca_timing = { .pixelclock = { 40000000, 40000000, 40000000 }, .hactive = { 334, 334, 334 }, @@ -3807,6 +3835,9 @@ static const struct of_device_id platform_of_match[] = { }, { .compatible = "edt,etmv570g2dhu", .data = &edt_etmv570g2dhu, + }, { + .compatible = "eink,ed103tc2", + .data = &eink_ed103tc2, }, { .compatible = "eink,vb3300-kca", .data = &eink_vb3300_kca, -- 2.35.1
