[Public] > -----Original Message----- > From: Alex Deucher <alexdeucher@xxxxxxxxx> > Sent: Friday, April 8, 2022 14:09 > To: Gong, Richard <Richard.Gong@xxxxxxx> > Cc: Deucher, Alexander <Alexander.Deucher@xxxxxxx>; Koenig, Christian > <Christian.Koenig@xxxxxxx>; Pan, Xinhui <Xinhui.Pan@xxxxxxx>; Dave Airlie > <airlied@xxxxxxxx>; Daniel Vetter <daniel@xxxxxxxx>; Limonciello, Mario > <Mario.Limonciello@xxxxxxx>; Maling list - DRI developers <dri- > devel@xxxxxxxxxxxxxxxxxxxxx>; amd-gfx list <amd-gfx@xxxxxxxxxxxxxxxxxxxxx>; > LKML <linux-kernel@xxxxxxxxxxxxxxx> > Subject: Re: [PATCHv2] drm/amdgpu: disable ASPM on Intel AlderLake based > systems > > On Fri, Apr 8, 2022 at 3:05 PM Richard Gong <richard.gong@xxxxxxx> wrote: > > > > Active State Power Management (ASPM) feature is enabled since kernel 5.14. > > There are some AMD GFX cards (such as WX3200 and RX640) that cannot be > > used with Intel AlderLake based systems to enable ASPM. Using these GFX > > cards as video/display output, Intel Alder Lake based systems will hang > > during suspend/resume. > > > > Add extra check to disable ASPM on Intel AlderLake based systems. > > > > Fixes: 0064b0ce85bb ("drm/amd/pm: enable ASPM by default") > > Link: > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.fr > eedesktop.org%2Fdrm%2Famd%2F- > %2Fissues%2F1885&data=04%7C01%7Cmario.limonciello%40amd.com%7 > C440357cd10e74d8c4e1d08da1993344b%7C3dd8961fe4884e608e11a82d994e1 > 83d%7C0%7C0%7C637850417310167943%7CUnknown%7CTWFpbGZsb3d8eyJ > WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C > 3000&sdata=WXyESh1FGlxgFLH14P7pYJu3tsyp53uKpUP9NyDV5yE%3D&am > p;reserved=0 > > Signed-off-by: Richard Gong <richard.gong@xxxxxxx> > > Reviewed-by: Alex Deucher <alexander.deucher@xxxxxxx> Reviewed-by: Mario Limonciello <mario.limonciello@xxxxxxx> > > > --- > > v2: correct commit description > > move the check from chip family to problematic platform > > --- > > drivers/gpu/drm/amd/amdgpu/vi.c | 17 ++++++++++++++++- > > 1 file changed, 16 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c > b/drivers/gpu/drm/amd/amdgpu/vi.c > > index 039b90cdc3bc..8b4eaf54b23e 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/vi.c > > +++ b/drivers/gpu/drm/amd/amdgpu/vi.c > > @@ -81,6 +81,10 @@ > > #include "mxgpu_vi.h" > > #include "amdgpu_dm.h" > > > > +#if IS_ENABLED(CONFIG_X86_64) > > +#include <asm/intel-family.h> > > +#endif > > + > > #define ixPCIE_LC_L1_PM_SUBSTATE 0x100100C6 > > #define > PCIE_LC_L1_PM_SUBSTATE__LC_L1_SUBSTATES_OVERRIDE_EN_MASK > 0x00000001L > > #define PCIE_LC_L1_PM_SUBSTATE__LC_PCI_PM_L1_2_OVERRIDE_MASK > 0x00000002L > > @@ -1134,13 +1138,24 @@ static void vi_enable_aspm(struct > amdgpu_device *adev) > > WREG32_PCIE(ixPCIE_LC_CNTL, data); > > } > > > > +static bool intel_core_apsm_chk(void) > > +{ > > +#if IS_ENABLED(CONFIG_X86_64) > > + struct cpuinfo_x86 *c = &cpu_data(0); > > + > > + return (c->x86 == 6 && c->x86_model == INTEL_FAM6_ALDERLAKE); > > +#else > > + return false; > > +#endif > > +} > > + > > static void vi_program_aspm(struct amdgpu_device *adev) > > { > > u32 data, data1, orig; > > bool bL1SS = false; > > bool bClkReqSupport = true; > > > > - if (!amdgpu_device_should_use_aspm(adev)) > > + if (!amdgpu_device_should_use_aspm(adev) || intel_core_apsm_chk()) > > return; > > > > if (adev->flags & AMD_IS_APU || > > -- > > 2.25.1 > >