On Fri, Apr 08, 2022 at 09:36:17AM +0800, CK Hu wrote: > Hi, Jitao & Rex: > > Please help to comment on this patch. Hi Chuang, I already sent a v2 of this patch [1] because I forgot to add the Fixes tag. Sorry for the noise. Thanks, Nícolas [1] https://lore.kernel.org/all/20220408013950.674477-1-nfraprado@xxxxxxxxxxxxx/ > > On Thu, 2022-04-07 at 21:19 -0400, Nícolas F. R. A. Prado wrote: > > The configuration for mt8192 was incorrectly using the output formats > > from mt8173. Since the output formats for mt8192 are instead the same > > ones as for mt8183, which require two bus samples per pixel, the > > pixelclock and DDR edge setting were misconfigured. This made > > external > > displays unable to show the image. > > > > Fix the issue by correcting the output format for mt8192 to be the > > same > > as for mt8183, fixing the usage of external displays for mt8192. > > > > Signed-off-by: Nícolas F. R. A. Prado <nfraprado@xxxxxxxxxxxxx> > > > > --- > > > > drivers/gpu/drm/mediatek/mtk_dpi.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > > b/drivers/gpu/drm/mediatek/mtk_dpi.c > > index 4554e2de1430..e61cd67b978f 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > > @@ -819,8 +819,8 @@ static const struct mtk_dpi_conf mt8192_conf = { > > .cal_factor = mt8183_calculate_factor, > > .reg_h_fre_con = 0xe0, > > .max_clock_khz = 150000, > > - .output_fmts = mt8173_output_fmts, > > - .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts), > > + .output_fmts = mt8183_output_fmts, > > + .num_output_fmts = ARRAY_SIZE(mt8183_output_fmts), > > }; > > > > static int mtk_dpi_probe(struct platform_device *pdev) >
