Hi, Miles: On Wed, 2022-03-16 at 07:23 +0800, Miles Chen wrote: > In current implementation, mtk_cec_mask() writes val into target > register > and ignores the mask. After talking to our hdmi experts, > mtk_cec_mask() > should read a register, clean only mask bits, and update (val | mask) > bits > to the register. Applied to mediatek-drm-next [1], thanks. [1] https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next Regards, CK > > Fixes: 8f83f26891e1 ("drm/mediatek: Add HDMI support") > Signed-off-by: Miles Chen <miles.chen@xxxxxxxxxxxx> > Reviewed-by: Chun-Kuang Hu <chunkuang.hu@xxxxxxxxxx> > Reviewed-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@xxxxxxxxxxxxx> > Reviewed-by: Matthias Brugger <matthias.bgg@xxxxxxxxx> > Cc: Zhiqiang Lin <zhiqiang.lin@xxxxxxxxxxxx> > Cc: CK Hu <ck.hu@xxxxxxxxxxxx> > Cc: Matthias Brugger <matthias.bgg@xxxxxxxxx> > Cc: AngeloGioacchino Del Regno < > angelogioacchino.delregno@xxxxxxxxxxxxx> > > --- > > Change since v1: > add Fixes tag > > Change since v2: > add explanation of mtk_cec_mask() > > Change since v3: > change misleading subject and modify the commit message since this is > a bug fix patch > > --- > drivers/gpu/drm/mediatek/mtk_cec.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_cec.c > b/drivers/gpu/drm/mediatek/mtk_cec.c > index e9cef5c0c8f7..cdfa648910b2 100644 > --- a/drivers/gpu/drm/mediatek/mtk_cec.c > +++ b/drivers/gpu/drm/mediatek/mtk_cec.c > @@ -85,7 +85,7 @@ static void mtk_cec_mask(struct mtk_cec *cec, > unsigned int offset, > u32 tmp = readl(cec->regs + offset) & ~mask; > > tmp |= val & mask; > - writel(val, cec->regs + offset); > + writel(tmp, cec->regs + offset); > } > > void mtk_cec_set_hpd_event(struct device *dev,
