Hello Xinlei, Thanks for your patch, and there are something I want to know: On Thu, 2022-03-17 at 15:53 +0800, xinlei.lee@xxxxxxxxxxxx wrote: > From: Jitao Shi <jitao.shi@xxxxxxxxxxxx> > > Old sequence: > 1. Pull the MIPI signal high > 2. Delay & Dsi_reset > 3. Set the dsi timing register > 4. dsi clk & lanes leave ulp mode and enter hs mode > > New sequence: > 1. Set the dsi timing register > 2. Pull the MIPI signal high > 3. Delay & Dsi_reset > 4. dsi clk & lanes leave ulp mode and enter hs mode > Could you explain why you want to change original power on sequence?
