Drop the assigned clock rate property and vote on the mdp clock as per calculated value during the usecase. This patch is dependent on below patch https://patchwork.kernel.org/patch/12774067/ Signed-off-by: Vinod Polimera <quic_vpolimer@xxxxxxxxxxx> Reviewed-by: Stephen Boyd <swboyd@xxxxxxxxxxxx> --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index fdaf303..2105eb7 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -3164,9 +3164,6 @@ <&dispcc DISP_CC_MDSS_MDP_CLK>; clock-names = "iface", "bus", "nrt_bus", "core"; - assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>; - assigned-clock-rates = <460000000>; - interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <1>; @@ -3191,10 +3188,8 @@ <&dispcc DISP_CC_MDSS_VSYNC_CLK>; clock-names = "iface", "bus", "core", "vsync"; - assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>, - <&dispcc DISP_CC_MDSS_VSYNC_CLK>; - assigned-clock-rates = <460000000>, - <19200000>; + assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>; + assigned-clock-rates = <19200000>; operating-points-v2 = <&mdp_opp_table>; power-domains = <&rpmhpd SM8250_MMCX>; -- 2.7.4
