Quoting Dmitry Baryshkov (2022-01-19 14:40:02)
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
> similarity index 58%
> rename from drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
> rename to drivers/gpu/drm/msm/msm_mdss.c
> index 9f5cc7f9e9a9..f5429eb0ae52 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
> +++ b/drivers/gpu/drm/msm/msm_mdss.c
> @@ -188,22 +182,64 @@ static void dpu_mdss_destroy(struct msm_mdss *mdss)
>
> pm_runtime_suspend(mdss->dev);
> pm_runtime_disable(mdss->dev);
> - _dpu_mdss_irq_domain_fini(dpu_mdss);
> + irq_domain_remove(dpu_mdss->irq_controller.domain);
> + dpu_mdss->irq_controller.domain = NULL;
> irq = platform_get_irq(pdev, 0);
> irq_set_chained_handler_and_data(irq, NULL, NULL);
> -
> - if (dpu_mdss->mmio)
> - devm_iounmap(&pdev->dev, dpu_mdss->mmio);
> - dpu_mdss->mmio = NULL;
> }
>
> static const struct msm_mdss_funcs mdss_funcs = {
> - .enable = dpu_mdss_enable,
> - .disable = dpu_mdss_disable,
> - .destroy = dpu_mdss_destroy,
> + .enable = msm_mdss_enable,
> + .disable = msm_mdss_disable,
> + .destroy = msm_mdss_destroy,
> };
>
> -int dpu_mdss_init(struct platform_device *pdev)
> +/*
> + * MDP5 MDSS uses at most three specified clocks.
> + */
> +#define MDP5_MDSS_NUM_CLOCKS 3
> +int mdp5_mdss_parse_clock(struct platform_device *pdev, struct clk_bulk_data **clocks)
static?
> +{
> + struct clk_bulk_data *bulk;
> + struct clk *clk;
> + int num_clocks = 0;
> +
> + if (!pdev)
> + return -EINVAL;
> +
> + bulk = devm_kcalloc(&pdev->dev, MDP5_MDSS_NUM_CLOCKS, sizeof(struct clk_bulk_data), GFP_KERNEL);
> + if (!bulk)
> + return -ENOMEM;
> +
> + /* We ignore all the errors except deferral: typically they mean that the clock is not provided in the dts. */
> + clk = msm_clk_get(pdev, "iface");
> + if (!IS_ERR(clk)) {
> + bulk[num_clocks].id = "iface";
> + bulk[num_clocks].clk = clk;
> + num_clocks++;
> + } else if (clk == ERR_PTR(-EPROBE_DEFER))
> + return -EPROBE_DEFER;
> +
> + clk = msm_clk_get(pdev, "bus");
> + if (!IS_ERR(clk)) {
> + bulk[num_clocks].id = "bus";
> + bulk[num_clocks].clk = clk;
> + num_clocks++;
> + } else if (clk == ERR_PTR(-EPROBE_DEFER))
> + return -EPROBE_DEFER;
> +
> + clk = msm_clk_get(pdev, "vsync");
> + if (!IS_ERR(clk)) {
> + bulk[num_clocks].id = "vsync";
> + bulk[num_clocks].clk = clk;
> + num_clocks++;
> + } else if (clk == ERR_PTR(-EPROBE_DEFER))
> + return -EPROBE_DEFER;
> +
> + return num_clocks;
> +}
> +
> +int msm_mdss_init(struct platform_device *pdev, bool mdp5)
Maybe is_mdp5 so the if reads simpler.
> {
> struct msm_drm_private *priv = platform_get_drvdata(pdev);
> struct dpu_mdss *dpu_mdss;
> @@ -220,27 +256,28 @@ int dpu_mdss_init(struct platform_device *pdev)
>
> DRM_DEBUG("mapped mdss address space @%pK\n", dpu_mdss->mmio);
>
> - ret = msm_parse_clock(pdev, &dpu_mdss->clocks);
> + if (mdp5)
> + ret = mdp5_mdss_parse_clock(pdev, &dpu_mdss->clocks);
> + else
> + ret = msm_parse_clock(pdev, &dpu_mdss->clocks);
> if (ret < 0) {
> - DPU_ERROR("failed to parse clocks, ret=%d\n", ret);
> - goto clk_parse_err;
> + DRM_ERROR("failed to parse clocks, ret=%d\n", ret);
> + return ret;
> }
> dpu_mdss->num_clocks = ret;
