Quoting Laurent Pinchart (2022-02-21 17:13:39)
> The VSP1 sink selection through register DEFR8 is only available on Gen2
> hardware. Skip it on Gen3.
aha, interesting, and I see how this leads into the second patch.
Looks fine on it's own too though:
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@xxxxxxxxxxxxxxxx>
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@xxxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/rcar-du/rcar_du_plane.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.c b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
> index 862197be1e01..9b058d6cb032 100644
> --- a/drivers/gpu/drm/rcar-du/rcar_du_plane.c
> +++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
> @@ -549,8 +549,10 @@ void __rcar_du_plane_setup(struct rcar_du_group *rgrp,
> rcar_du_plane_setup_format(rgrp, (state->hwindex + 1) % 8,
> state);
>
> - if (rcdu->info->gen < 3)
> - rcar_du_plane_setup_scanout(rgrp, state);
> + if (rcdu->info->gen >= 3)
> + return;
> +
> + rcar_du_plane_setup_scanout(rgrp, state);
>
> if (state->source == RCAR_DU_PLANE_VSPD1) {
> unsigned int vspd1_sink = rgrp->index ? 2 : 0;
> --
> Regards,
>
> Laurent Pinchart
>
