Re: [Intel-gfx] [PATCH v2 1/3] drm/i915/dg2: Enable 5th port

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On Fri, Feb 18, 2022 at 12:12:21AM +0530, Ramalingam C wrote:
From: Matt Roper <matthew.d.roper@xxxxxxxxx>

DG2 supports a 5th display output which the hardware refers to as "TC1,"
even though it isn't a Type-C output.  This behaves similarly to the TC1
on past platforms with just a couple minor differences:

* DG2's TC1 bit in SDEISR is at bit 25 rather than 24 as it is on
  ICP/TGP/ADP.
* DG2 doesn't need the hpd inversion setting that we had to use on DG1

v2:
 intel_ddi_init(dev_priv, PORT_TC1); [Matt]

Cc: Swathi Dhanavanthri <swathi.dhanavanthri@xxxxxxxxx>
Cc: Lucas De Marchi <lucas.demarchi@xxxxxxxxx>
Cc: José Roberto de Souza <jose.souza@xxxxxxxxx>
Signed-off-by: Matt Roper <matthew.d.roper@xxxxxxxxx>
Signed-off-by: Ramalingam C <ramalingam.c@xxxxxxxxx>


Reviewed-by: Lucas De Marchi <lucas.demarchi@xxxxxxxxx>

Lucas De Marchi



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