Re: [Intel-gfx] [PATCH 3/3] drm/i915: Fix for PHY_MISC_TC1 offset

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On Tue, Feb 15, 2022 at 11:21:54AM +0530, Ramalingam C wrote:
From: Jouni Högander <jouni.hogander@xxxxxxxxx>

Currently ICL_PHY_MISC macro is returning offset 0x64C10 for PHY_E
port. Correct offset is 0x64C14.

Fix this by handling PHY_E port seprately.

order of the patch here is wrong. This patch should come before
the patch initializing the 5th port. Then the commit message is not
a fix.

This can be done while applying since it's more an order to avoid
breaking the tree.

Lucas De Marchi



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