Hi Vinod, On 2022-02-17 16:21:35, Vinod Koul wrote: > Hi Marijn, > > On 17-02-22, 10:27, Marijn Suijten wrote: > > Vinod, > > > > On 2022-02-10 16:04:23, Vinod Koul wrote: > > > When DSC is enabled, we need to configure DSI registers accordingly and > > > configure the respective stream compression registers. > > > > > > Add support to calculate the register setting based on DSC params and > > > timing information and configure these registers. > > > > > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> > > > Signed-off-by: Vinod Koul <vkoul@xxxxxxxxxx> > > > > I supplied a rather extensive - yet merely scratching the surface - > > review of this patch in: > > > > https://lore.kernel.org/linux-arm-msm/20211211000315.pavmcc7cc73ilb6l@xxxxxxxxxxxxxx/ > > Sorry somehow I seem to have overlooked this one. Glad to hear it was only just missed, hope it helps making these patches truly a step-up from the downstream driver it was based on :) > > > > It seems none of those points have been addressed, bar creating a mesa > > MR to update dsi.xml with a subpar description of the registers (offsets > > only). > > Mesa MR was planned as we get more closer to having reviews. I would have submitted them in parallel straight away and link them together, so that review can commence immediately on both. Perhaps then the XML could be merged up-front so that these patches don't need to block on a stable commit-hash to regenerate the headers from? In this case I/we would have immediately requested to move all the register constants and offsets (even those that currently have an unknown meaning) into the XML, and we can later fill in the details. > > For every point that is intentionally ignored, please at least supply a > > justification of why you think this is the right thing to do. > > Ofcourse, i will reply to these now and address as required. Thanks, I'll try to clarify some points ASAP before you respin this. - Marijn
