On Wed, 09 Feb 2022, Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> wrote:
> On Wed, Feb 09, 2022 at 11:09:41AM +0200, Jani Nikula wrote:
>> On Tue, 08 Feb 2022, Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> wrote:
>> > On Thu, Feb 03, 2022 at 11:03:55AM +0200, Jani Nikula wrote:
>> >> Abstract link status check to a function that takes 128b/132b and 8b/10b
>> >> into account, and use it. Also dump link status on failures.
>> >>
>> >> Cc: Uma Shankar <uma.shankar@xxxxxxxxx>
>> >> Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>> >> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
>> >> ---
>> >> drivers/gpu/drm/i915/display/intel_dp.c | 39 ++++++++++++++-----
>> >> .../drm/i915/display/intel_dp_link_training.c | 2 +-
>> >> .../drm/i915/display/intel_dp_link_training.h | 4 ++
>> >> 3 files changed, 34 insertions(+), 11 deletions(-)
>> >>
>> >> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> >> index 146b83916005..8c5590f0409a 100644
>> >> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> >> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> >> @@ -3628,6 +3628,32 @@ static void intel_dp_handle_test_request(struct intel_dp *intel_dp)
>> >> "Could not write test response to sink\n");
>> >> }
>> >>
>> >> +static bool intel_dp_link_ok(struct intel_dp *intel_dp,
>> >> + u8 link_status[DP_LINK_STATUS_SIZE])
>> >> +{
>> >> + struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
>> >> + struct drm_i915_private *i915 = to_i915(encoder->base.dev);
>> >> + bool uhbr = intel_dp->link_rate >= 1000000;
>> >> + bool ok;
>> >> +
>> >> + if (uhbr)
>> >> + ok = drm_dp_128b132b_lane_channel_eq_done(link_status,
>> >> + intel_dp->lane_count);
>> >
>> > I was pondering whether we need to check more of the bits here. I guess
>> > time will tell.
>> >
>> > Remainder of the series is
>> > Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>>
>> Just to be on the safe side, does this cover patches 2 and 4 too?
>
> Yeah, pretty sure I read through all of them.
Thanks, pushed to drm-intel-next, patches 1-3 with Thomas' irc ack.
BR,
Jani.
>
>>
>> And thanks for all the reviews so far, much appreciated!
>>
>> BR,
>> Jani.
>>
>>
>> >
>> >> + else
>> >> + ok = drm_dp_channel_eq_ok(link_status, intel_dp->lane_count);
>> >> +
>> >> + if (ok)
>> >> + return true;
>> >> +
>> >> + intel_dp_dump_link_status(intel_dp, DP_PHY_DPRX, link_status);
>> >> + drm_dbg_kms(&i915->drm,
>> >> + "[ENCODER:%d:%s] %s link not ok, retraining\n",
>> >> + encoder->base.base.id, encoder->base.name,
>> >> + uhbr ? "128b/132b" : "8b/10b");
>> >> +
>> >> + return false;
>> >> +}
>> >> +
>> >> static void
>> >> intel_dp_mst_hpd_irq(struct intel_dp *intel_dp, u8 *esi, u8 *ack)
>> >> {
>> >> @@ -3658,14 +3684,7 @@ static bool intel_dp_mst_link_status(struct intel_dp *intel_dp)
>> >> return false;
>> >> }
>> >>
>> >> - if (!drm_dp_channel_eq_ok(link_status, intel_dp->lane_count)) {
>> >> - drm_dbg_kms(&i915->drm,
>> >> - "[ENCODER:%d:%s] channel EQ not ok, retraining\n",
>> >> - encoder->base.base.id, encoder->base.name);
>> >> - return false;
>> >> - }
>> >> -
>> >> - return true;
>> >> + return intel_dp_link_ok(intel_dp, link_status);
>> >> }
>> >>
>> >> /**
>> >> @@ -3779,8 +3798,8 @@ intel_dp_needs_link_retrain(struct intel_dp *intel_dp)
>> >> intel_dp->lane_count))
>> >> return false;
>> >>
>> >> - /* Retrain if Channel EQ or CR not ok */
>> >> - return !drm_dp_channel_eq_ok(link_status, intel_dp->lane_count);
>> >> + /* Retrain if link not ok */
>> >> + return !intel_dp_link_ok(intel_dp, link_status);
>> >> }
>> >>
>> >> static bool intel_dp_has_connector(struct intel_dp *intel_dp,
>> >> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
>> >> index cc2b82d9114c..0686da36c428 100644
>> >> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
>> >> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
>> >> @@ -712,7 +712,7 @@ static bool intel_dp_adjust_request_changed(const struct intel_crtc_state *crtc_
>> >> return false;
>> >> }
>> >>
>> >> -static void
>> >> +void
>> >> intel_dp_dump_link_status(struct intel_dp *intel_dp, enum drm_dp_phy dp_phy,
>> >> const u8 link_status[DP_LINK_STATUS_SIZE])
>> >> {
>> >> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.h b/drivers/gpu/drm/i915/display/intel_dp_link_training.h
>> >> index dbfb15705aaa..dc1556b46b85 100644
>> >> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.h
>> >> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.h
>> >> @@ -29,6 +29,10 @@ void intel_dp_start_link_train(struct intel_dp *intel_dp,
>> >> void intel_dp_stop_link_train(struct intel_dp *intel_dp,
>> >> const struct intel_crtc_state *crtc_state);
>> >>
>> >> +void
>> >> +intel_dp_dump_link_status(struct intel_dp *intel_dp, enum drm_dp_phy dp_phy,
>> >> + const u8 link_status[DP_LINK_STATUS_SIZE]);
>> >> +
>> >> /* Get the TPSx symbol type of the value programmed to DP_TRAINING_PATTERN_SET */
>> >> static inline u8 intel_dp_training_pattern_symbol(u8 pattern)
>> >> {
>> >> --
>> >> 2.30.2
>>
>> --
>> Jani Nikula, Intel Open Source Graphics Center
--
Jani Nikula, Intel Open Source Graphics Center
