On Fri, 04 Feb 2022, Kees Cook <keescook@xxxxxxxxxxxx> wrote:
> Ping,
>
> This is a OOB read fix. Can someone please pick this up?
Daniel? Thierry?
As I said, I reviewed this but I'm not comfortable applying patches that
change the functionality of drivers I don't maintain.
BR,
Jani.
>
> -Kees
>
> On Wed, Jan 05, 2022 at 09:35:07AM -0800, Kees Cook wrote:
>> The link_status array was not large enough to read the Adjust Request
>> Post Cursor2 register, so remove the common helper function to avoid
>> an OOB read, found with a -Warray-bounds build:
>>
>> drivers/gpu/drm/drm_dp_helper.c: In function 'drm_dp_get_adjust_request_post_cursor':
>> drivers/gpu/drm/drm_dp_helper.c:59:27: error: array subscript 10 is outside array bounds of 'const u8[6]' {aka 'const unsigned char[6]'} [-Werror=array-bounds]
>> 59 | return link_status[r - DP_LANE0_1_STATUS];
>> | ~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/drm_dp_helper.c:147:51: note: while referencing 'link_status'
>> 147 | u8 drm_dp_get_adjust_request_post_cursor(const u8 link_status[DP_LINK_STATUS_SIZE],
>> | ~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>>
>> Replace the only user of the helper with an open-coded fetch and decode,
>> similar to drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c.
>>
>> Fixes: 79465e0ffeb9 ("drm/dp: Add helper to get post-cursor adjustments")
>> Cc: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx>
>> Cc: Maxime Ripard <mripard@xxxxxxxxxx>
>> Cc: Thomas Zimmermann <tzimmermann@xxxxxxx>
>> Cc: David Airlie <airlied@xxxxxxxx>
>> Cc: Daniel Vetter <daniel@xxxxxxxx>
>> Cc: dri-devel@xxxxxxxxxxxxxxxxxxxxx
>> Signed-off-by: Kees Cook <keescook@xxxxxxxxxxxx>
>> ---
>> This is the alternative to:
>> https://lore.kernel.org/lkml/20211203084354.3105253-1-keescook@xxxxxxxxxxxx/
>> ---
>> drivers/gpu/drm/drm_dp_helper.c | 10 ----------
>> drivers/gpu/drm/tegra/dp.c | 11 ++++++++++-
>> include/drm/drm_dp_helper.h | 2 --
>> 3 files changed, 10 insertions(+), 13 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
>> index 23f9073bc473..c9528aa62c9c 100644
>> --- a/drivers/gpu/drm/drm_dp_helper.c
>> +++ b/drivers/gpu/drm/drm_dp_helper.c
>> @@ -144,16 +144,6 @@ u8 drm_dp_get_adjust_tx_ffe_preset(const u8 link_status[DP_LINK_STATUS_SIZE],
>> }
>> EXPORT_SYMBOL(drm_dp_get_adjust_tx_ffe_preset);
>>
>> -u8 drm_dp_get_adjust_request_post_cursor(const u8 link_status[DP_LINK_STATUS_SIZE],
>> - unsigned int lane)
>> -{
>> - unsigned int offset = DP_ADJUST_REQUEST_POST_CURSOR2;
>> - u8 value = dp_link_status(link_status, offset);
>> -
>> - return (value >> (lane << 1)) & 0x3;
>> -}
>> -EXPORT_SYMBOL(drm_dp_get_adjust_request_post_cursor);
>> -
>> static int __8b10b_clock_recovery_delay_us(const struct drm_dp_aux *aux, u8 rd_interval)
>> {
>> if (rd_interval > 4)
>> diff --git a/drivers/gpu/drm/tegra/dp.c b/drivers/gpu/drm/tegra/dp.c
>> index 70dfb7d1dec5..f5535eb04c6b 100644
>> --- a/drivers/gpu/drm/tegra/dp.c
>> +++ b/drivers/gpu/drm/tegra/dp.c
>> @@ -549,6 +549,15 @@ static void drm_dp_link_get_adjustments(struct drm_dp_link *link,
>> {
>> struct drm_dp_link_train_set *adjust = &link->train.adjust;
>> unsigned int i;
>> + u8 post_cursor;
>> + int err;
>> +
>> + err = drm_dp_dpcd_read(link->aux, DP_ADJUST_REQUEST_POST_CURSOR2,
>> + &post_cursor, sizeof(post_cursor));
>> + if (err < 0) {
>> + DRM_ERROR("failed to read post_cursor2: %d\n", err);
>> + post_cursor = 0;
>> + }
>>
>> for (i = 0; i < link->lanes; i++) {
>> adjust->voltage_swing[i] =
>> @@ -560,7 +569,7 @@ static void drm_dp_link_get_adjustments(struct drm_dp_link *link,
>> DP_TRAIN_PRE_EMPHASIS_SHIFT;
>>
>> adjust->post_cursor[i] =
>> - drm_dp_get_adjust_request_post_cursor(status, i);
>> + (post_cursor >> (i << 1)) & 0x3;
>> }
>> }
>>
>> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
>> index 472dac376284..fdf3cf6ccc02 100644
>> --- a/include/drm/drm_dp_helper.h
>> +++ b/include/drm/drm_dp_helper.h
>> @@ -1528,8 +1528,6 @@ u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SI
>> int lane);
>> u8 drm_dp_get_adjust_tx_ffe_preset(const u8 link_status[DP_LINK_STATUS_SIZE],
>> int lane);
>> -u8 drm_dp_get_adjust_request_post_cursor(const u8 link_status[DP_LINK_STATUS_SIZE],
>> - unsigned int lane);
>>
>> #define DP_BRANCH_OUI_HEADER_SIZE 0xc
>> #define DP_RECEIVER_CAP_SIZE 0xf
>> --
>> 2.30.2
>>
--
Jani Nikula, Intel Open Source Graphics Center
