Hi, Guillaume:
On Fri, 2021-12-17 at 16:08 +0100, Guillaume Ranquet wrote:
> From: Markus Schneider-Pargmann <msp@xxxxxxxxxxxx>
>
> dpintf is the displayport interface hardware unit. This unit is
> similar
> to dpi and can reuse most of the code.
>
> This patch adds support for mt8195-dpintf to this dpi driver. Main
> differences are:
> - Some features/functional components are not available for dpintf
> which are now excluded from code execution once is_dpintf is set
> - dpintf can and needs to choose between different clockdividers
> based
> on the clockspeed. This is done by choosing a different clock
> parent.
> - There are two additional clocks that need to be managed. These are
> only set for dpintf and will be set to NULL if not supplied. The
> clk_* calls handle these as normal clocks then.
> - Some register contents differ slightly between the two components.
> To
> work around this I added register bits/masks with a DPINTF_ prefix
> and use them where different.
>
> Based on a separate driver for dpintf created by
> Jason-JH.Lin <jason-jh.lin@xxxxxxxxxxxx>.
>
> Signed-off-by: Markus Schneider-Pargmann <msp@xxxxxxxxxxxx>
> Signed-off-by: Guillaume Ranquet <granquet@xxxxxxxxxxxx>
> Reviewed-by: AngeloGioacchino Del Regno <
> angelogioacchino.delregno@xxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/mediatek/mtk_dpi.c | 304 ++++++++++++++++
> ----
> drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 38 +++
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 4 +
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 +
> drivers/gpu/drm/mediatek/mtk_drm_drv.c | 5 +-
> include/linux/soc/mediatek/mtk-mmsys.h | 2 +
> 6 files changed, 299 insertions(+), 55 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
> b/drivers/gpu/drm/mediatek/mtk_dpi.c
> index 4554e2de14309..fbc43ea4049b9 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> @@ -63,6 +63,14 @@ enum mtk_dpi_out_color_format {
> MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL
> };
>
> +enum TVDPLL_CLK {
> + TVDPLL_PLL = 0,
> + TVDPLL_D2 = 2,
> + TVDPLL_D4 = 4,
> + TVDPLL_D8 = 8,
> + TVDPLL_D16 = 16,
> +};
> +
> struct mtk_dpi {
> struct drm_encoder encoder;
> struct drm_bridge bridge;
> @@ -71,8 +79,10 @@ struct mtk_dpi {
> void __iomem *regs;
> struct device *dev;
> struct clk *engine_clk;
> + struct clk *dpi_ck_cg;
> struct clk *pixel_clk;
> struct clk *tvd_clk;
> + struct clk *pclk_src[5];
> int irq;
> struct drm_display_mode mode;
> const struct mtk_dpi_conf *conf;
> @@ -125,6 +135,18 @@ struct mtk_dpi_conf {
> bool edge_sel_en;
> const u32 *output_fmts;
> u32 num_output_fmts;
> + bool is_ck_de_pol;
Seperate is_ck_de_pol to an independent patch.
> + bool is_dpintf;
Ditto for is_dpintf. And I would like change the name to what this
actually do.
> + bool csc_support;
Ditto for csc_support.
> + bool swap_input_support;
Ditto for swap_input_support.
> + // Mask used for HWIDTH, HPORCH, VSYNC_WIDTH and VSYNC_PORCH
/* ... */
> (no shift)
> + u32 dimension_mask;
Ditto for dimension_mask.
> + // Mask used for HSIZE and VSIZE (no shift)
> + u32 hvsize_mask;
Ditto for hvsize_mask.
> + u32 channel_swap_shift;
Ditto for channel_swap_shift.
> + u32 yuv422_en_bit;
Ditto for yuv422_en_bit.
> + u32 csc_enable_bit;
Ditto for csc_enable_bit.
> + const struct mtk_dpi_yc_limit *limit;
Ditto for limit.
> };
>
>
> +
> +static const struct mtk_dpi_conf mt8195_dpintf_conf = {
> + .cal_factor = mt8195_dpintf_calculate_factor,
> + .output_fmts = mt8195_output_fmts,
> + .num_output_fmts = ARRAY_SIZE(mt8195_output_fmts),
> + .is_dpintf = true,
> + .csc_support = true,
For every SoC, csc_support is true. Why do we need csc_support?
Regards,
CK
> + .dimension_mask = DPINTF_HPW_MASK,
> + .hvsize_mask = DPINTF_HSIZE_MASK,
> + .channel_swap_shift = DPINTF_CH_SWAP,
> + .yuv422_en_bit = DPINTF_YUV422_EN,
> + .csc_enable_bit = DPINTF_CSC_ENABLE,
> + .limit = &mtk_dpintf_limit,
> };
>
>
