Hi Am 03.10.21 um 00:15 schrieb Patrik Jakobsson:
On Tue, Sep 28, 2021 at 10:44 AM Thomas Zimmermann <tzimmermann@xxxxxxx> wrote:Caching of the GEM object's backing pages are unrelated to GTT management. Move the respective calls from GTT code to GEM code. Signed-off-by: Thomas Zimmermann <tzimmermann@xxxxxxx> --- drivers/gpu/drm/gma500/gem.c | 9 ++++++++- drivers/gpu/drm/gma500/gtt.c | 17 ++--------------- drivers/gpu/drm/gma500/gtt.h | 2 +- 3 files changed, 11 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/gma500/gem.c b/drivers/gpu/drm/gma500/gem.c index 46209e10dcc2..a88d51a3aa2a 100644 --- a/drivers/gpu/drm/gma500/gem.c +++ b/drivers/gpu/drm/gma500/gem.c @@ -13,6 +13,8 @@ #include <linux/pagemap.h> +#include <asm/set_memory.h> + #include <drm/drm.h> #include <drm/drm_vma_manager.h> @@ -39,7 +41,9 @@ int psb_gem_pin(struct gtt_range *gt) npages = gt->gem.size / PAGE_SIZE; - ret = psb_gtt_insert(dev, gt, 0); + set_pages_array_wc(pages, npages); + + ret = psb_gtt_insert(dev, gt); if (ret) goto err_drm_gem_put_pages; @@ -80,6 +84,9 @@ void psb_gem_unpin(struct gtt_range *gt) (gpu_base + gt->offset), gt->npage, 0, 0); psb_gtt_remove(dev, gt); + /* Reset caching flags */ + set_pages_array_wb(gt->pages, gt->npage); + drm_gem_put_pages(>->gem, gt->pages, true, false); gt->pages = NULL; diff --git a/drivers/gpu/drm/gma500/gtt.c b/drivers/gpu/drm/gma500/gtt.c index 5d940fdbe6b8..244de618e612 100644 --- a/drivers/gpu/drm/gma500/gtt.c +++ b/drivers/gpu/drm/gma500/gtt.c @@ -7,10 +7,6 @@ * Alan Cox <alan@xxxxxxxxxxxxxxx> */ -#include <linux/shmem_fs.h> - -#include <asm/set_memory.h> - #include "psb_drv.h" @@ -92,17 +88,15 @@ static u32 __iomem *psb_gtt_entry(struct drm_device *dev, struct gtt_range *r) * psb_gtt_insert - put an object into the GTT * @dev: our DRM device * @r: our GTT range - * @resume: on resume * * Take our preallocated GTT range and insert the GEM object into * the GTT. This is protected via the gtt mutex which the caller * must hold. */ -int psb_gtt_insert(struct drm_device *dev, struct gtt_range *r, int resume) +int psb_gtt_insert(struct drm_device *dev, struct gtt_range *r) { u32 __iomem *gtt_slot; u32 pte; - struct page **pages; int i; if (r->pages == NULL) { @@ -113,12 +107,6 @@ int psb_gtt_insert(struct drm_device *dev, struct gtt_range *r, int resume) WARN_ON(r->stolen); /* refcount these maybe ? */ gtt_slot = psb_gtt_entry(dev, r); - pages = r->pages; - - if (!resume) { - /* Make sure changes are visible to the GPU */ - set_pages_array_wc(pages, r->npage); - }I don't quite remember why we have this but I suspect something bad happened when setting WC on a page with WC already set. Did you try hibernation?
I took the code as-is. I guess that reading back BO memory with read caching enabled didn't work well when fbdev acceleration was still around.
Best regards Thomas
/* Write our page entries into the GTT itself */ for (i = 0; i < r->npage; i++) { @@ -158,7 +146,6 @@ void psb_gtt_remove(struct drm_device *dev, struct gtt_range *r) for (i = 0; i < r->npage; i++) iowrite32(pte, gtt_slot++); ioread32(gtt_slot - 1); - set_pages_array_wb(r->pages, r->npage); } static void psb_gtt_alloc(struct drm_device *dev) @@ -349,7 +336,7 @@ int psb_gtt_restore(struct drm_device *dev) while (r != NULL) { range = container_of(r, struct gtt_range, resource); if (range->pages) { - psb_gtt_insert(dev, range, 1); + psb_gtt_insert(dev, range); size += range->resource.end - range->resource.start; restored++; } diff --git a/drivers/gpu/drm/gma500/gtt.h b/drivers/gpu/drm/gma500/gtt.h index 459a03141e8b..7af71617e0c5 100644 --- a/drivers/gpu/drm/gma500/gtt.h +++ b/drivers/gpu/drm/gma500/gtt.h @@ -49,7 +49,7 @@ int psb_gtt_allocate_resource(struct drm_psb_private *pdev, struct resource *res const char *name, resource_size_t size, resource_size_t align, bool stolen, u32 offset[static 1]); -int psb_gtt_insert(struct drm_device *dev, struct gtt_range *r, int resume); +int psb_gtt_insert(struct drm_device *dev, struct gtt_range *r); void psb_gtt_remove(struct drm_device *dev, struct gtt_range *r); #endif -- 2.33.0
-- Thomas Zimmermann Graphics Driver Developer SUSE Software Solutions Germany GmbH Maxfeldstr. 5, 90409 Nürnberg, Germany (HRB 36809, AG Nürnberg) Geschäftsführer: Felix Imendörffer
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