Hi Enric,
Thanks for the reviews.
On Wed, 2021-09-08 at 10:32 +0200, Enric Balletbo i Serra wrote:
> Hi Jason,
>
> Thank you for your patch. One small comment below.
>
> On 8/9/21 8:02, jason-jh.lin wrote:
> > Power:
> > 1. Add description for power-domains property.
> >
> > GCE:
> > 1. Add description for mboxes property.
> > 2. Add description for mediatek,gce-client-reg property.
> >
> > Signed-off-by: jason-jh.lin <jason-jh.lin@xxxxxxxxxxxx>
> > ---
> > .../bindings/arm/mediatek/mediatek,mmsys.yaml | 30
> > ++++++++++++++++++-
> > 1 file changed, 29 insertions(+), 1 deletion(-)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yam
> > l
> > b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yam
> > l
> > index 2d4ff0ce387b..a2e7bddfed03 100644
> > ---
> > a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yam
> > l
> > +++
> > b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yam
> > l
> > @@ -39,6 +39,30 @@ properties:
> > reg:
> > maxItems: 1
> >
> > + power-domains:
> > + description:
> > + A phandle and PM domain specifier as defined by bindings
> > + of the power controller specified by phandle. See
> > + Documentation/devicetree/bindings/power/power-domain.yaml
> > for details.
> > +
> > + mboxes:
> > + description:
> > + Using mailbox to communicate with GCE, it should have this
> > + property and list of phandle, mailbox specifiers. See
> > + Documentation/devicetree/bindings/mailbox/mtk-gce.txt for
> > details.
> > + $ref: /schemas/types.yaml#/definitions/phandle-array
> > +
> > + mediatek,gce-client-reg:
> > + description:
> > + The register of client driver can be configured by gce with
> > 4 arguments
> > + defined in this property, such as phandle of gce, subsys id,
> > + register offset and size.
> > + Each subsys id is mapping to a base address of display
> > function blocks
> > + register which is defined in the gce header
> > + include/dt-bindings/gce/<chip>-gce.h.
> > + $ref: /schemas/types.yaml#/definitions/phandle-array
> > + maxItems: 1
> > +
> > "#clock-cells":
> > const: 1
> >
> > @@ -53,6 +77,10 @@ examples:
> > - |
> > mmsys: syscon@14000000 {
> > compatible = "mediatek,mt8173-mmsys", "syscon";
> > - reg = <0x14000000 0x1000>;
> > + reg = <0 0x14000000 0 0x1000>;
>
> Why this change?
>
> Thanks,
> Enric
>
I think the first version of this example is not correct.
I,ve checked the first version of mt8173.
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/arch/arm64/boot/dts/mediatek/mt8173.dtsi?id=b3a37248415716663ea2d752da4a5f765fc87442
Because #address-cells and #size-cells of parent node are defined as 2.
e.g.
soc {
#address-cells = <2>;
#size-cells = <2>;
...
};
Regards,
Jason-JH.Lin
>
> > + power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
> > #clock-cells = <1>;
> > + mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
> > + <&gce 1 CMDQ_THR_PRIO_HIGHEST>;
> > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
> > };
> >
--
Jason-JH Lin <jason-jh.lin@xxxxxxxxxxxx>
