Re: [PATCH] drm/i915/dp: Use max params for older panels

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On Wed, Aug 04, 2021 at 11:24:02PM +0800, Kai-Heng Feng wrote:
> Users reported that after commit 2bbd6dba84d4 ("drm/i915: Try to use
> fast+narrow link on eDP again and fall back to the old max strategy on
> failure"), the screen starts to have wobbly effect.
> 
> Commit a5c936add6a2 ("drm/i915/dp: Use slow and wide link training for
> everything") doesn't help either, that means the affected panels only
> work with max params.

Unfortunate that the link training apparently passes with the bad
params and thus the automagic use_max_params fallback doesn't kick in
:(

> 
> The panels are all DP 1.1 ones, so apply max params to them to resolve
> the issue.
> 
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/3714
> Fixes: 2bbd6dba84d4 ("drm/i915: Try to use fast+narrow link on eDP again and fall back to the old max strategy on failure")
> Fixes: a5c936add6a2 ("drm/i915/dp: Use slow and wide link training for everything")
> Signed-off-by: Kai-Heng Feng <kai.heng.feng@xxxxxxxxxxxxx>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 12 +++++++-----
>  1 file changed, 7 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 75d4ebc669411..e64bab4b016e1 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1330,14 +1330,16 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
>  	limits.min_bpp = intel_dp_min_bpp(pipe_config->output_format);
>  	limits.max_bpp = intel_dp_max_bpp(intel_dp, pipe_config);
>  
> -	if (intel_dp->use_max_params) {
> +	if (intel_dp->use_max_params ||
> +	    intel_dp->dpcd[DP_DPCD_REV] <= DP_DPCD_REV_11) {

IIRC Windows uses the optimal link rate only for EPD_REV>=1.4.
We should probably do the same the minimize future headaches.

>  		/*
>  		 * Use the maximum clock and number of lanes the eDP panel
>  		 * advertizes being capable of in case the initial fast
> -		 * optimal params failed us. The panels are generally
> -		 * designed to support only a single clock and lane
> -		 * configuration, and typically on older panels these
> -		 * values correspond to the native resolution of the panel.
> +		 * optimal params failed us or the panel is DP 1.1 or earlier.
> +		 * The panels are generally designed to support only a single
> +		 * clock and lane configuration, and typically on older panels
> +		 * these values correspond to the native resolution of the
> +		 * panel.
>  		 */
>  		limits.min_lane_count = limits.max_lane_count;
>  		limits.min_clock = limits.max_clock;
> -- 
> 2.31.1

-- 
Ville Syrjälä
Intel



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