On Fri, Jul 23, 2021 at 05:10:51PM -0700, Lucas De Marchi wrote: > No need for special CNL handling as there is no real platform with that > configuration. > > Signed-off-by: Lucas De Marchi <lucas.demarchi@xxxxxxxxx> Reviewed-by: Matt Roper <matthew.d.roper@xxxxxxxxx> > --- > drivers/gpu/drm/i915/display/intel_crtc.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c > index 448c4d99ac35..254e67141a77 100644 > --- a/drivers/gpu/drm/i915/display/intel_crtc.c > +++ b/drivers/gpu/drm/i915/display/intel_crtc.c > @@ -335,7 +335,7 @@ int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe) > dev_priv->plane_to_crtc_mapping[i9xx_plane] = crtc; > } > > - if (DISPLAY_VER(dev_priv) >= 11 || IS_CANNONLAKE(dev_priv)) > + if (DISPLAY_VER(dev_priv) >= 11) > drm_crtc_create_scaling_filter_property(&crtc->base, > BIT(DRM_SCALING_FILTER_DEFAULT) | > BIT(DRM_SCALING_FILTER_NEAREST_NEIGHBOR)); > -- > 2.31.1 > -- Matt Roper Graphics Software Engineer VTT-OSGC Platform Enablement Intel Corporation (916) 356-2795
