Hi Maxime, I love your patch! Perhaps something to improve: [auto build test WARNING on drm-intel/for-linux-next] [cannot apply to drm-tip/drm-tip anholt/for-next v5.13 next-20210628] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Maxime-Ripard/drm-vc4-hdmi-Support-the-4k-60Hz-modes/20210628-204514 base: git://anongit.freedesktop.org/drm-intel for-linux-next config: x86_64-randconfig-a002-20210628 (attached as .config) compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project 4c92e31dd0f1bd152eda883af20ff7fbcaa14945) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install x86_64 cross compiling tool for clang build # apt-get install binutils-x86-64-linux-gnu # https://github.com/0day-ci/linux/commit/1a67588c095aa22f70656da4b59474fdc8419e58 git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Maxime-Ripard/drm-vc4-hdmi-Support-the-4k-60Hz-modes/20210628-204514 git checkout 1a67588c095aa22f70656da4b59474fdc8419e58 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@xxxxxxxxx> All warnings (new ones prefixed by >>): >> drivers/gpu/drm/vc4/vc4_plane.c:532:18: warning: variable 'vc4' set but not used [-Wunused-but-set-variable] struct vc4_dev *vc4; ^ 1 warning generated. vim +/vc4 +532 drivers/gpu/drm/vc4/vc4_plane.c 5c6799942003df Eric Anholt 2015-12-28 524 4686da83154d87 Boris Brezillon 2019-02-20 525 static void vc4_plane_calc_load(struct drm_plane_state *state) 4686da83154d87 Boris Brezillon 2019-02-20 526 { 4686da83154d87 Boris Brezillon 2019-02-20 527 unsigned int hvs_load_shift, vrefresh, i; 4686da83154d87 Boris Brezillon 2019-02-20 528 struct drm_framebuffer *fb = state->fb; 4686da83154d87 Boris Brezillon 2019-02-20 529 struct vc4_plane_state *vc4_state; 4686da83154d87 Boris Brezillon 2019-02-20 530 struct drm_crtc_state *crtc_state; 4686da83154d87 Boris Brezillon 2019-02-20 531 unsigned int vscale_factor; f437bc1ec731d3 Maxime Ripard 2020-09-03 @532 struct vc4_dev *vc4; f437bc1ec731d3 Maxime Ripard 2020-09-03 533 f437bc1ec731d3 Maxime Ripard 2020-09-03 534 vc4 = to_vc4_dev(state->plane->dev); 4686da83154d87 Boris Brezillon 2019-02-20 535 vc4_state = to_vc4_plane_state(state); 4686da83154d87 Boris Brezillon 2019-02-20 536 crtc_state = drm_atomic_get_existing_crtc_state(state->state, 4686da83154d87 Boris Brezillon 2019-02-20 537 state->crtc); 4686da83154d87 Boris Brezillon 2019-02-20 538 vrefresh = drm_mode_vrefresh(&crtc_state->adjusted_mode); 4686da83154d87 Boris Brezillon 2019-02-20 539 4686da83154d87 Boris Brezillon 2019-02-20 540 /* The HVS is able to process 2 pixels/cycle when scaling the source, 4686da83154d87 Boris Brezillon 2019-02-20 541 * 4 pixels/cycle otherwise. 4686da83154d87 Boris Brezillon 2019-02-20 542 * Alpha blending step seems to be pipelined and it's always operating 4686da83154d87 Boris Brezillon 2019-02-20 543 * at 4 pixels/cycle, so the limiting aspect here seems to be the 4686da83154d87 Boris Brezillon 2019-02-20 544 * scaler block. 4686da83154d87 Boris Brezillon 2019-02-20 545 * HVS load is expressed in clk-cycles/sec (AKA Hz). 4686da83154d87 Boris Brezillon 2019-02-20 546 */ 4686da83154d87 Boris Brezillon 2019-02-20 547 if (vc4_state->x_scaling[0] != VC4_SCALING_NONE || 4686da83154d87 Boris Brezillon 2019-02-20 548 vc4_state->x_scaling[1] != VC4_SCALING_NONE || 4686da83154d87 Boris Brezillon 2019-02-20 549 vc4_state->y_scaling[0] != VC4_SCALING_NONE || 4686da83154d87 Boris Brezillon 2019-02-20 550 vc4_state->y_scaling[1] != VC4_SCALING_NONE) 4686da83154d87 Boris Brezillon 2019-02-20 551 hvs_load_shift = 1; 4686da83154d87 Boris Brezillon 2019-02-20 552 else 4686da83154d87 Boris Brezillon 2019-02-20 553 hvs_load_shift = 2; 4686da83154d87 Boris Brezillon 2019-02-20 554 4686da83154d87 Boris Brezillon 2019-02-20 555 vc4_state->membus_load = 0; 4686da83154d87 Boris Brezillon 2019-02-20 556 vc4_state->hvs_load = 0; 4686da83154d87 Boris Brezillon 2019-02-20 557 for (i = 0; i < fb->format->num_planes; i++) { 4686da83154d87 Boris Brezillon 2019-02-20 558 /* Even if the bandwidth/plane required for a single frame is 4686da83154d87 Boris Brezillon 2019-02-20 559 * 4686da83154d87 Boris Brezillon 2019-02-20 560 * vc4_state->src_w[i] * vc4_state->src_h[i] * cpp * vrefresh 4686da83154d87 Boris Brezillon 2019-02-20 561 * 4686da83154d87 Boris Brezillon 2019-02-20 562 * when downscaling, we have to read more pixels per line in 4686da83154d87 Boris Brezillon 2019-02-20 563 * the time frame reserved for a single line, so the bandwidth 4686da83154d87 Boris Brezillon 2019-02-20 564 * demand can be punctually higher. To account for that, we 4686da83154d87 Boris Brezillon 2019-02-20 565 * calculate the down-scaling factor and multiply the plane 4686da83154d87 Boris Brezillon 2019-02-20 566 * load by this number. We're likely over-estimating the read 4686da83154d87 Boris Brezillon 2019-02-20 567 * demand, but that's better than under-estimating it. 4686da83154d87 Boris Brezillon 2019-02-20 568 */ 4686da83154d87 Boris Brezillon 2019-02-20 569 vscale_factor = DIV_ROUND_UP(vc4_state->src_h[i], 4686da83154d87 Boris Brezillon 2019-02-20 570 vc4_state->crtc_h); 4686da83154d87 Boris Brezillon 2019-02-20 571 vc4_state->membus_load += vc4_state->src_w[i] * 4686da83154d87 Boris Brezillon 2019-02-20 572 vc4_state->src_h[i] * vscale_factor * 4686da83154d87 Boris Brezillon 2019-02-20 573 fb->format->cpp[i]; 4686da83154d87 Boris Brezillon 2019-02-20 574 vc4_state->hvs_load += vc4_state->crtc_h * vc4_state->crtc_w; 4686da83154d87 Boris Brezillon 2019-02-20 575 } 4686da83154d87 Boris Brezillon 2019-02-20 576 4686da83154d87 Boris Brezillon 2019-02-20 577 vc4_state->hvs_load *= vrefresh; 4686da83154d87 Boris Brezillon 2019-02-20 578 vc4_state->hvs_load >>= hvs_load_shift; 4686da83154d87 Boris Brezillon 2019-02-20 579 vc4_state->membus_load *= vrefresh; 4686da83154d87 Boris Brezillon 2019-02-20 580 } 4686da83154d87 Boris Brezillon 2019-02-20 581 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@xxxxxxxxxxxx
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