On 6/3/21 11:48 AM, Matthew Auld wrote:
On Wed, 2 Jun 2021 at 18:08, Thomas Hellström <thomas.hellstrom@xxxxxxxxxxxxxxx> wrote:For discrete, use TTM for both cached and WC system memory. That means we currently rely on the TTM memory accounting / shrinker. For cached system memory we should consider remaining shmem-backed, which can be implemented from our ttm_tt_populate calback. We can then also reuse our own very elaborate shrinker for that memory. Signed-off-by: Thomas Hellström <thomas.hellstrom@xxxxxxxxxxxxxxx> --- drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 22 ++++++++++++++++++++++ drivers/gpu/drm/i915/i915_drv.h | 3 --- drivers/gpu/drm/i915/intel_memory_region.c | 7 ++++++- drivers/gpu/drm/i915/intel_memory_region.h | 8 ++++++++ 4 files changed, 36 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c index 8e1c01168c6d..42e89bf43708 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c @@ -755,3 +755,25 @@ int __i915_gem_ttm_object_init(struct intel_memory_region *mem, /* i915 wants -ENXIO when out of memory region space. */ return (ret == -ENOSPC) ? -ENXIO : ret; } + +static const struct intel_memory_region_ops ttm_system_region_ops = { + .init_object = __i915_gem_ttm_object_init, +}; + +struct intel_memory_region * +i915_gem_ttm_system_setup(struct drm_i915_private *i915, + u16 type, u16 instance) +{ + struct intel_memory_region *mr; + + mr = intel_memory_region_create(i915, 0, + totalram_pages() << PAGE_SHIFT, + PAGE_SIZE, 0, + type, instance, + &ttm_system_region_ops); + if (IS_ERR_OR_NULL(mr))region_create can't return NULL.
OK, will fix.
