On 31/05/2021 17:42, Bjorn Andersson wrote:
On Fri 28 May 10:33 CDT 2021, Dmitry Baryshkov wrote:
On 07/04/2021 18:01, Dmitry Baryshkov wrote:
Move the bus clock to mdp device node,in order to facilitate bus band
width scaling on sdm845 target.
The parent device MDSS will not vote for bus bw, instead the vote will
be triggered by mdp device node. Since a minimum vote is required to
turn on bus clock, move the clock node to mdp device from where the
votes are requested.
drm/msm patches were merged through the msm tree (targeting 5.13). Shouldn't
we also merge these two patches (targeting 5.13 as fixes or 5.14)?
Does the vote for the bus clock result in an improvement or is the
device simply not working without it?
This was requested by Kalyan Thota [1]. If I understand correctly, if
the bootloader does not setup the bus vote, clock might not be enabled.
Thus it has to be used from the device which handles bus voting. Kalyan
might be in better position to comment on this.
Compare with
https://lore.kernel.org/linux-arm-msm/1594899334-19772-2-git-send-email-kalyan_t@xxxxxxxxxxxxxx/
[1]:
https://lore.kernel.org/linux-arm-msm/04b4612dfd3f651ead068725409211a0@xxxxxxxxxxxxxx/
Regards,
Bjorn
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 7395ef20b90e..55704804c2ca 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -4136,9 +4136,8 @@ mdss: mdss@ae00000 {
power-domains = <&dispcc MDSS_GDSC>;
clocks = <&gcc GCC_DISP_AHB_CLK>,
- <&gcc GCC_DISP_AXI_CLK>,
<&dispcc DISP_CC_MDSS_MDP_CLK>;
- clock-names = "iface", "bus", "core";
+ clock-names = "iface", "core";
assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>;
assigned-clock-rates = <300000000>;
@@ -4166,11 +4165,12 @@ mdss_mdp: mdp@ae01000 {
<0 0x0aeb0000 0 0x2008>;
reg-names = "mdp", "vbif";
- clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ clocks = <&gcc GCC_DISP_AXI_CLK>,
+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
<&dispcc DISP_CC_MDSS_AXI_CLK>,
<&dispcc DISP_CC_MDSS_MDP_CLK>,
<&dispcc DISP_CC_MDSS_VSYNC_CLK>;
- clock-names = "iface", "bus", "core", "vsync";
+ clock-names = "gcc-bus", "iface", "bus", "core", "vsync";
assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>,
<&dispcc DISP_CC_MDSS_VSYNC_CLK>;
--
With best wishes
Dmitry
--
With best wishes
Dmitry
