On 5/25/21 4:23 PM, Mike Looijmans wrote:
Hi,
[...]
Which system/soc are you testing this on ?
On a raspberry-pi 4 at the moment.
Ah, OK, it seems this bridge is popular on RPi.
Is there some adapter board with such a bridge for RPi available ?
Nope, but about 4 subscribers on the RPi forum have created their own
PCB. I'm working for a company that did their own PCB too and my job for
them is to get it to work...
The DSI-to-LVDS bridge is a lot cheaper (and simpler) than a
HDMI-to-LVDS bridge. In hardware that is.
Oh, I see
[...]
Alternatively, one can modify the RPi DSI code to start sending data
after the enable calls. That also works on my setup, with everything
in enable.
The major point here is that you should pick one and only one
callback: pre-enable or enable. The GPIO reset code as well as
writing the registers should be done in that one method.
Why , please elaborate ? It seems to be if there was no need for those
two callbacks, there would be no two callbacks in the API in the first
place. There is a chance you will get disable()->enable() sequence
without going through post_disable()->pre_enable() as far as I can tell.
The datasheet states that "the DSI CLK lanes MUST be in HS state and the
DSI data lanes MUST be driven to LP11 state" when the reset de-asserts
(goes high) and when the CSR registers are being written.
Your driver now de-asserts the reset in the pre_enable and writes the
CSR registers in enable. This is the "least likely to work" option.
Understood. However, it seems to work on iMX8MM and MN just fine.
Is there a problem on the RPi, that the driver does not work on it ?
Both the reset and the CSR writing are to be done in the same context.
So either everything in "pre_enable", or everything in "enable". Which
one is correct is up to the maintainers, I also don't know which is
best. The other callback can just remain unused.
If the choice is to do the chip initialization in "pre_enable" then do
all the de-initialization in "post_disable". If the choice is to do the
chip initialization in "enable" then do all the de-initialization in
"disable".
If for some platform the choice happens to be wrong, it's a very simple
patch (just change the "ops" pointers) to change it and make it work for
that platform.
Alternatively, it's possible to make it a runtime choice through
devicetree or so as to whether the CSR initializes at "enable" or
"pre-enable".
That would mean you encode policy in DT, so not an option.
I would suggest we stop this discussion until there is input from the
maintainers. It could even be there is an API missing for configuring
the clock/data/LP/HS modes which needs to be added.
Same for (post)disable for symmetry. There's no point keeping the
chip awake after a disable.
It's pretty likely for a DSI driver to have the clock active in order
to allow the panel driver to send MIPI commands and things like that.
So everything in pre_enable makes sense.
That's how the RPi behaves, on MX8M the DSI clock are active only in
enable. But that might be wrong, see below.
I don't know how the platform you're testing on is behaving in this
respect?
iMX8M{M,N}.
And I suspect the DSI behaves differently than on RPi. And that is why
I would like to get some clarification on what (clock, data, LP and
HS) is enabled where from the maintainers.
Suspect so.
Yes
As I wrote before, any DSI that adheres to the documentation
would never work with this chip. The chip won't work without clock and
it also won't work if the DSI is already sending video data is my
experience.
The later part would mean this driver could never work on iMX8M, but it
does, on multiple iMX8MM and MN. So the chip must be tolerant at least
toward data on the data lanes when it is being configured.
[...]
