On 28.04.21 09:51, Frieder Schrempf wrote:
On 22.04.21 00:31, Marek Vasut wrote:
Add driver for TI SN65DSI83 Single-link DSI to Single-link LVDS bridge
and TI SN65DSI84 Single-link DSI to Dual-link or 2x Single-link LVDS
bridge. TI SN65DSI85 is unsupported due to lack of hardware to test on,
but easy to add.
The driver operates the chip via I2C bus. Currently the LVDS clock are
always derived from DSI clock lane, which is the usual mode of operation.
Support for clock from external oscillator is not implemented, but it is
easy to add if ever needed. Only RGB888 pixel format is implemented, the
LVDS666 is not supported, but could be added if needed.
Signed-off-by: Marek Vasut <marex@xxxxxxx>
Cc: Douglas Anderson <dianders@xxxxxxxxxxxx>
Cc: Jagan Teki <jagan@xxxxxxxxxxxxxxxxxxxx>
Cc: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx>
Cc: Linus Walleij <linus.walleij@xxxxxxxxxx>
Cc: Philippe Schenker <philippe.schenker@xxxxxxxxxxx>
Cc: Sam Ravnborg <sam@xxxxxxxxxxxx>
Cc: Stephen Boyd <swboyd@xxxxxxxxxxxx>
Cc: Valentin Raevsky <valentin@xxxxxxxxxxxxxx>
To: dri-devel@xxxxxxxxxxxxxxxxxxxxx
Tested-by: Loic Poulain <loic.poulain@xxxxxxxxxx>
---
V2: - Use dev_err_probe()
- Set REG_RC_RESET as volatile
- Wait for PLL stabilization by polling REG_RC_LVDS_PLL
- Use ctx->mode = *adj instead of *mode in sn65dsi83_mode_set
- Add tested DSI84 support in dual-link mode
- Correctly set VCOM
- Fill in missing DSI CHB and LVDS CHB bits from DSI84 and DSI85
datasheets, with that all the reserved bits make far more sense
as the DSI83 and DSI84 seems to be reduced version of DSI85
---
drivers/gpu/drm/bridge/Kconfig | 10 +
drivers/gpu/drm/bridge/Makefile | 1 +
drivers/gpu/drm/bridge/ti-sn65dsi83.c | 617 ++++++++++++++++++++++++++
3 files changed, 628 insertions(+)
create mode 100644 drivers/gpu/drm/bridge/ti-sn65dsi83.c
[...]
+static int sn65dsi83_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct device *dev = &client->dev;
+ enum sn65dsi83_model model;
+ struct sn65dsi83 *ctx;
+ int ret;
+
+ ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
+ if (!ctx)
+ return -ENOMEM;
+
+ ctx->dev = dev;
+
+ if (dev->of_node)
+ model = (enum sn65dsi83_model)of_device_get_match_data(dev);
+ else
+ model = id->driver_data;
+
+ /* Default to dual-link LVDS on all but DSI83. */
+ if (model != MODEL_SN65DSI83)
+ ctx->lvds_dual_link = true;
What if I use the DSI84 with a single link LVDS? I can't see any way to
configure that right now.
I just saw the note in the header of the driver that says that single
link mode is unsupported for the DSI84.
I have hardware with a single link display and if I set
ctx->lvds_dual_link = false it works just fine.
How is this supposed to be selected? Does it need an extra devicetree
property? And would you mind adding single-link support in the next
version or do you prefer adding it in a follow-up patch?
+
+ ctx->enable_gpio = devm_gpiod_get(ctx->dev, "enable",
GPIOD_OUT_LOW);
+ if (IS_ERR(ctx->enable_gpio))
+ return PTR_ERR(ctx->enable_gpio);
+
+ ret = sn65dsi83_parse_dt(ctx);
+ if (ret)
+ return ret;
+
+ ctx->regmap = devm_regmap_init_i2c(client,
&sn65dsi83_regmap_config);
+ if (IS_ERR(ctx->regmap))
+ return PTR_ERR(ctx->regmap);
+
+ dev_set_drvdata(dev, ctx);
+ i2c_set_clientdata(client, ctx);
+
+ ctx->bridge.funcs = &sn65dsi83_funcs;
+ ctx->bridge.of_node = dev->of_node;
+ drm_bridge_add(&ctx->bridge);
+
+ return 0;
+}
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