Hi Maxime
Sorry for the delay in reviewing these patches.
On Thu, 18 Mar 2021 at 09:29, Maxime Ripard <maxime@xxxxxxxxxx> wrote:
>
> The BVB clock rate computation doesn't take into account a mode clock of
> 594MHz that we're going to need to support 4k60.
>
> Signed-off-by: Maxime Ripard <maxime@xxxxxxxxxx>
Reviewed-by: Dave Stevenson <dave.stevenson@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/vc4/vc4_hdmi.c | 17 +++++++++--------
> 1 file changed, 9 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
> index eee9751009c2..eaee853bb404 100644
> --- a/drivers/gpu/drm/vc4/vc4_hdmi.c
> +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
> @@ -91,7 +91,6 @@
> # define VC4_HD_M_ENABLE BIT(0)
>
> #define CEC_CLOCK_FREQ 40000
> -#define VC4_HSM_MID_CLOCK 149985000
>
> #define HDMI_14_MAX_TMDS_CLK (340 * 1000 * 1000)
>
> @@ -739,7 +738,7 @@ static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder,
> conn_state_to_vc4_hdmi_conn_state(conn_state);
> struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
> struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
> - unsigned long pixel_rate, hsm_rate;
> + unsigned long bvb_rate, pixel_rate, hsm_rate;
> int ret;
>
> ret = pm_runtime_get_sync(&vc4_hdmi->pdev->dev);
> @@ -793,12 +792,14 @@ static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder,
>
> vc4_hdmi_cec_update_clk_div(vc4_hdmi);
>
> - /*
> - * FIXME: When the pixel freq is 594MHz (4k60), this needs to be setup
> - * at 300MHz.
> - */
> - ret = clk_set_min_rate(vc4_hdmi->pixel_bvb_clock,
> - (hsm_rate > VC4_HSM_MID_CLOCK ? 150000000 : 75000000));
> + if (pixel_rate > 297000000)
> + bvb_rate = 300000000;
> + else if (pixel_rate > 148500000)
> + bvb_rate = 150000000;
> + else
> + bvb_rate = 75000000;
> +
> + ret = clk_set_min_rate(vc4_hdmi->pixel_bvb_clock, bvb_rate);
> if (ret) {
> DRM_ERROR("Failed to set pixel bvb clock rate: %d\n", ret);
> clk_disable_unprepare(vc4_hdmi->hsm_clock);
> --
> 2.30.2
>
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