On Fri, Mar 19, 2021 at 8:06 PM Lucas Stach <l.stach@xxxxxxxxxxxxxx> wrote:
>
> Vivante TS (tile-status) buffer modifiers. They can be combined with all of
> the Vivante color buffer tiling modifiers, so they are kind of a modifier
> modifier. If a TS modifier is present we have a additional plane for the
> TS buffer and the modifier defines the layout of this TS buffer.
>
> Signed-off-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
> ---
> include/uapi/drm/drm_fourcc.h | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> index f76de49c768f..76df2a932637 100644
> --- a/include/uapi/drm/drm_fourcc.h
> +++ b/include/uapi/drm/drm_fourcc.h
> @@ -623,6 +623,22 @@ extern "C" {
> */
> #define DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED fourcc_mod_code(VIVANTE, 4)
>
> +/*
> + * Vivante TS (tile-status) buffer modifiers. They can be combined with all of
> + * the color buffer tiling modifiers defined above. When TS is present it's a
> + * separate buffer containing the clear/compression status of each tile. The
> + * modifiers are defined as VIVANTE_MOD_TS_c_s, where c is the color buffer tile
> + * size in bytes covered by one entry in the status buffer and s is the number
> + * of status bits per entry.
Might be worth it to go into alignment/rounding/stride requirements
here too, if you know them. Either way lgtm.
Acked-by: Daniel Vetter <daniel.vetter@xxxxxxxx>
> + * We reserve the top 8bits of the Vivante modifier space for TS modifiers, as
> + * future cores might add some more TS layout variations.
> + */
> +#define VIVANTE_MOD_TS_64_4 (1ULL << 48)
> +#define VIVANTE_MOD_TS_64_2 (2ULL << 48)
> +#define VIVANTE_MOD_TS_128_4 (3ULL << 48)
> +#define VIVANTE_MOD_TS_256_4 (4ULL << 48)
> +#define VIVANTE_MOD_TS_MASK (0xffULL << 48)
> +
> /* NVIDIA frame buffer modifiers */
>
> /*
> --
> 2.29.2
>
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--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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